Abstract
Toward any practical applications of 2D transition metal dichalcogenide (TMD) transistors, two issues are often met. First, threshold voltage (Vth) of usual TMD 2D field effect transistors (FETs) is located quite away from 0 V, making the device already on and less practical. Second, a large hysteresis exists during transistor operation. Here, hysteresis-minimized n-TMD FETs are fabricated using polymer-brush/channel interface, to extend the 2D FET study to a sensor application. Gated by piezoelectric P(VDF-TrFE) touch pad that allows dipole switching and instantaneous voltages of +5 and -5 V, n-MoSe2 FET operates well in its ON/OFF drain current behavior, due to its properly small Vth of −5 V. However, n-MoS2 FET with a relatively high Vth of more than −8 V cannot be suitably switched off. To minimize the gate hysteresis, ultrathin polystyrene-brush layer is applied between TMD channel and 50 nm thin Al2O3 dielectric. n-Channel MoS2 and MoSe2 FETs exhibit a minimum voltage hysteresis of 1 and 0.5 V, respectively. It is regarded that Vth and hysteresis issues are uneasy to resolve but still possible to circumvent by using proper TMD channel and channel/dielectric interface materials.
| Original language | English |
|---|---|
| Article number | 1800812 |
| Journal | Advanced Materials Interfaces |
| Volume | 5 |
| Issue number | 19 |
| DOIs | |
| Publication status | Published - 2018 Oct 9 |
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All Science Journal Classification (ASJC) codes
- Mechanics of Materials
- Mechanical Engineering
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2D MoSe2 Transistor with Polymer-Brush/Channel Interface. / Jeong, Yeonsu; Park, Ji Hoon; Ahn, Jongtae; Lim, June Yeong; Kim, Eunkyoung; Im, Seongil.
In: Advanced Materials Interfaces, Vol. 5, No. 19, 1800812, 09.10.2018.Research output: Contribution to journal › Article
TY - JOUR
T1 - 2D MoSe2 Transistor with Polymer-Brush/Channel Interface
AU - Jeong, Yeonsu
AU - Park, Ji Hoon
AU - Ahn, Jongtae
AU - Lim, June Yeong
AU - Kim, Eunkyoung
AU - Im, Seongil
PY - 2018/10/9
Y1 - 2018/10/9
N2 - Toward any practical applications of 2D transition metal dichalcogenide (TMD) transistors, two issues are often met. First, threshold voltage (Vth) of usual TMD 2D field effect transistors (FETs) is located quite away from 0 V, making the device already on and less practical. Second, a large hysteresis exists during transistor operation. Here, hysteresis-minimized n-TMD FETs are fabricated using polymer-brush/channel interface, to extend the 2D FET study to a sensor application. Gated by piezoelectric P(VDF-TrFE) touch pad that allows dipole switching and instantaneous voltages of +5 and -5 V, n-MoSe2 FET operates well in its ON/OFF drain current behavior, due to its properly small Vth of −5 V. However, n-MoS2 FET with a relatively high Vth of more than −8 V cannot be suitably switched off. To minimize the gate hysteresis, ultrathin polystyrene-brush layer is applied between TMD channel and 50 nm thin Al2O3 dielectric. n-Channel MoS2 and MoSe2 FETs exhibit a minimum voltage hysteresis of 1 and 0.5 V, respectively. It is regarded that Vth and hysteresis issues are uneasy to resolve but still possible to circumvent by using proper TMD channel and channel/dielectric interface materials.
AB - Toward any practical applications of 2D transition metal dichalcogenide (TMD) transistors, two issues are often met. First, threshold voltage (Vth) of usual TMD 2D field effect transistors (FETs) is located quite away from 0 V, making the device already on and less practical. Second, a large hysteresis exists during transistor operation. Here, hysteresis-minimized n-TMD FETs are fabricated using polymer-brush/channel interface, to extend the 2D FET study to a sensor application. Gated by piezoelectric P(VDF-TrFE) touch pad that allows dipole switching and instantaneous voltages of +5 and -5 V, n-MoSe2 FET operates well in its ON/OFF drain current behavior, due to its properly small Vth of −5 V. However, n-MoS2 FET with a relatively high Vth of more than −8 V cannot be suitably switched off. To minimize the gate hysteresis, ultrathin polystyrene-brush layer is applied between TMD channel and 50 nm thin Al2O3 dielectric. n-Channel MoS2 and MoSe2 FETs exhibit a minimum voltage hysteresis of 1 and 0.5 V, respectively. It is regarded that Vth and hysteresis issues are uneasy to resolve but still possible to circumvent by using proper TMD channel and channel/dielectric interface materials.
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U2 - 10.1002/admi.201800812
DO - 10.1002/admi.201800812
M3 - Article
VL - 5
JO - Advanced Materials Interfaces
JF - Advanced Materials Interfaces
SN - 2196-7350
IS - 19
M1 - 1800812
ER -