Abstract
Toward any practical applications of 2D transition metal dichalcogenide (TMD) transistors, two issues are often met. First, threshold voltage (Vth) of usual TMD 2D field effect transistors (FETs) is located quite away from 0 V, making the device already on and less practical. Second, a large hysteresis exists during transistor operation. Here, hysteresis-minimized n-TMD FETs are fabricated using polymer-brush/channel interface, to extend the 2D FET study to a sensor application. Gated by piezoelectric P(VDF-TrFE) touch pad that allows dipole switching and instantaneous voltages of +5 and -5 V, n-MoSe2 FET operates well in its ON/OFF drain current behavior, due to its properly small Vth of −5 V. However, n-MoS2 FET with a relatively high Vth of more than −8 V cannot be suitably switched off. To minimize the gate hysteresis, ultrathin polystyrene-brush layer is applied between TMD channel and 50 nm thin Al2O3 dielectric. n-Channel MoS2 and MoSe2 FETs exhibit a minimum voltage hysteresis of 1 and 0.5 V, respectively. It is regarded that Vth and hysteresis issues are uneasy to resolve but still possible to circumvent by using proper TMD channel and channel/dielectric interface materials.
Original language | English |
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Article number | 1800812 |
Journal | Advanced Materials Interfaces |
Volume | 5 |
Issue number | 19 |
DOIs | |
Publication status | Published - 2018 Oct 9 |
Bibliographical note
Funding Information:Y.J. and J.H.P. contributed equally to this work. The authors acknowledge the financial support from NRF (NRL program: Grant No. 2017R1A2A1A05001278, SRC program: Grant No.2017R1A5A1014862, vdWMRC). J.H.P acknowledges that this research was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF-2017R1A6A3A11035872).
Publisher Copyright:
© 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
All Science Journal Classification (ASJC) codes
- Mechanics of Materials
- Mechanical Engineering