3D Memory Formed of Unrepairable Memory Dice and Spare Layer

Donghyun Han, Hayoug Lee, Seungtaek Lee, Minho Moon, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

With the development of memory manufacturing technology, the density of memory die has been increased and more data can be stored in a small area than before. However, due to the complexity of the manufacturing process, faults in memory have increased. And it leads to poor yield and quality of memory. To improve yield and quality of the memory, the importance of memory test and repair is growing to maintain memory productivity. This paper presents solutions for test and repair in pre-bond. In the pre-bond, proposed method makes a new 3D stacked memory by using unrepairable memory dice which cannot be repaired with existing spare memories. Discard the bank with the largest number of faults in the unrepairable memory die and repair the remaining banks. The memory dice and a spare layer which made of the known good die or unrepairable memory die are stacked to create a 3D memory. A bank of the spare layer is mapped to discarded bank of unrepairable memory die to operate as one normal working memory die. The proposed method can lead to high yields of 3D stacked memory.

Original languageEnglish
Title of host publicationProceedings of TENCON 2018 - 2018 IEEE Region 10 Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1362-1366
Number of pages5
ISBN (Electronic)9781538654576
DOIs
Publication statusPublished - 2019 Feb 22
Event2018 IEEE Region 10 Conference, TENCON 2018 - Jeju, Korea, Republic of
Duration: 2018 Oct 282018 Oct 31

Publication series

NameIEEE Region 10 Annual International Conference, Proceedings/TENCON
Volume2018-October
ISSN (Print)2159-3442
ISSN (Electronic)2159-3450

Conference

Conference2018 IEEE Region 10 Conference, TENCON 2018
CountryKorea, Republic of
CityJeju
Period18/10/2818/10/31

Bibliographical note

Funding Information:
This research was supported by the MOTIE (Ministry of Trade, Industry & Energy (10052875) and KSRC (Korea Semiconductor Research Consortium) support program for developing future semiconductor devices D. Han, H. Lee, S. Lee and M. Moon are with the Computer Systems Reliable SOC Laboratory, Department of Electrical and Electronic Engineering, Yonsei University, Seoul 120-749, South Korea (e-mail: {tommyhan95; yseehy214; tegi98; jasonm} @soc.yonsei.ac.kr S. Kang (corresponding author) is associated with the Computer Systems Reliable SOC Laboratory, Department of Electrical and Electronic Engineering, Yonsei University, Seodaemoon-Gu Yonsei-Ro 50, Seoul 120-749, Korea. (e-mail: shkang@yonsei.ac.kr).

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Electrical and Electronic Engineering

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