5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise

Injun Park, Chanmin Park, Jimin Cheon, Youngcheol Chae

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The demand for high-frame-rate CMOS image sensors is steadily increasing. Column-parallel single-slope (SS) ADCs are widely used in CMOS image sensors, because they can be implemented with small area, low noise, and high energy efficiency. To achieve high frame rate and low noise simultaneously, several techniques using SS ADCs, such as parallel multiple sampling [1], [2], dual-gain slopes [3], and dual-gain amplifiers [4], have been investigated. However, since the clock frequency of the SS ADC is already in the GHz range, it is very challenging to maintain energy efficiency as the frame rate increases further.

Original languageEnglish
Title of host publication2019 IEEE International Solid-State Circuits Conference, ISSCC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages100-103
Number of pages4
ISBN (Electronic)9781538685310
DOIs
Publication statusPublished - 2019 Mar 6
Event2019 IEEE International Solid-State Circuits Conference, ISSCC 2019 - San Francisco, United States
Duration: 2019 Feb 172019 Feb 21

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume2019-February
ISSN (Print)0193-6530

Conference

Conference2019 IEEE International Solid-State Circuits Conference, ISSCC 2019
CountryUnited States
CitySan Francisco
Period19/2/1719/2/21

Fingerprint

Image sensors
Energy efficiency
Clocks
Sampling

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Park, I., Park, C., Cheon, J., & Chae, Y. (2019). 5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise. In 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019 (pp. 100-103). [8662388] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 2019-February). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSCC.2019.8662388
Park, Injun ; Park, Chanmin ; Cheon, Jimin ; Chae, Youngcheol. / 5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise. 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 100-103 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).
@inproceedings{31fe5117048b4730a342dafd8d80b190,
title = "5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise",
abstract = "The demand for high-frame-rate CMOS image sensors is steadily increasing. Column-parallel single-slope (SS) ADCs are widely used in CMOS image sensors, because they can be implemented with small area, low noise, and high energy efficiency. To achieve high frame rate and low noise simultaneously, several techniques using SS ADCs, such as parallel multiple sampling [1], [2], dual-gain slopes [3], and dual-gain amplifiers [4], have been investigated. However, since the clock frequency of the SS ADC is already in the GHz range, it is very challenging to maintain energy efficiency as the frame rate increases further.",
author = "Injun Park and Chanmin Park and Jimin Cheon and Youngcheol Chae",
year = "2019",
month = "3",
day = "6",
doi = "10.1109/ISSCC.2019.8662388",
language = "English",
series = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "100--103",
booktitle = "2019 IEEE International Solid-State Circuits Conference, ISSCC 2019",
address = "United States",

}

Park, I, Park, C, Cheon, J & Chae, Y 2019, 5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise. in 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019., 8662388, Digest of Technical Papers - IEEE International Solid-State Circuits Conference, vol. 2019-February, Institute of Electrical and Electronics Engineers Inc., pp. 100-103, 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019, San Francisco, United States, 19/2/17. https://doi.org/10.1109/ISSCC.2019.8662388

5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise. / Park, Injun; Park, Chanmin; Cheon, Jimin; Chae, Youngcheol.

2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 100-103 8662388 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 2019-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - 5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise

AU - Park, Injun

AU - Park, Chanmin

AU - Cheon, Jimin

AU - Chae, Youngcheol

PY - 2019/3/6

Y1 - 2019/3/6

N2 - The demand for high-frame-rate CMOS image sensors is steadily increasing. Column-parallel single-slope (SS) ADCs are widely used in CMOS image sensors, because they can be implemented with small area, low noise, and high energy efficiency. To achieve high frame rate and low noise simultaneously, several techniques using SS ADCs, such as parallel multiple sampling [1], [2], dual-gain slopes [3], and dual-gain amplifiers [4], have been investigated. However, since the clock frequency of the SS ADC is already in the GHz range, it is very challenging to maintain energy efficiency as the frame rate increases further.

AB - The demand for high-frame-rate CMOS image sensors is steadily increasing. Column-parallel single-slope (SS) ADCs are widely used in CMOS image sensors, because they can be implemented with small area, low noise, and high energy efficiency. To achieve high frame rate and low noise simultaneously, several techniques using SS ADCs, such as parallel multiple sampling [1], [2], dual-gain slopes [3], and dual-gain amplifiers [4], have been investigated. However, since the clock frequency of the SS ADC is already in the GHz range, it is very challenging to maintain energy efficiency as the frame rate increases further.

UR - http://www.scopus.com/inward/record.url?scp=85063532921&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85063532921&partnerID=8YFLogxK

U2 - 10.1109/ISSCC.2019.8662388

DO - 10.1109/ISSCC.2019.8662388

M3 - Conference contribution

T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

SP - 100

EP - 103

BT - 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Park I, Park C, Cheon J, Chae Y. 5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise. In 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc. 2019. p. 100-103. 8662388. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). https://doi.org/10.1109/ISSCC.2019.8662388