Abstract
The demand for high-frame-rate CMOS image sensors is steadily increasing. Column-parallel single-slope (SS) ADCs are widely used in CMOS image sensors, because they can be implemented with small area, low noise, and high energy efficiency. To achieve high frame rate and low noise simultaneously, several techniques using SS ADCs, such as parallel multiple sampling [1], [2], dual-gain slopes [3], and dual-gain amplifiers [4], have been investigated. However, since the clock frequency of the SS ADC is already in the GHz range, it is very challenging to maintain energy efficiency as the frame rate increases further.
Original language | English |
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Title of host publication | 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 100-103 |
Number of pages | 4 |
ISBN (Electronic) | 9781538685310 |
DOIs | |
Publication status | Published - 2019 Mar 6 |
Event | 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019 - San Francisco, United States Duration: 2019 Feb 17 → 2019 Feb 21 |
Publication series
Name | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
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Volume | 2019-February |
ISSN (Print) | 0193-6530 |
Conference
Conference | 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019 |
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Country | United States |
City | San Francisco |
Period | 19/2/17 → 19/2/21 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
Cite this
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5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise. / Park, Injun; Park, Chanmin; Cheon, Jimin; Chae, Youngcheol.
2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 100-103 8662388 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 2019-February).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - 5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random Noise
AU - Park, Injun
AU - Park, Chanmin
AU - Cheon, Jimin
AU - Chae, Youngcheol
PY - 2019/3/6
Y1 - 2019/3/6
N2 - The demand for high-frame-rate CMOS image sensors is steadily increasing. Column-parallel single-slope (SS) ADCs are widely used in CMOS image sensors, because they can be implemented with small area, low noise, and high energy efficiency. To achieve high frame rate and low noise simultaneously, several techniques using SS ADCs, such as parallel multiple sampling [1], [2], dual-gain slopes [3], and dual-gain amplifiers [4], have been investigated. However, since the clock frequency of the SS ADC is already in the GHz range, it is very challenging to maintain energy efficiency as the frame rate increases further.
AB - The demand for high-frame-rate CMOS image sensors is steadily increasing. Column-parallel single-slope (SS) ADCs are widely used in CMOS image sensors, because they can be implemented with small area, low noise, and high energy efficiency. To achieve high frame rate and low noise simultaneously, several techniques using SS ADCs, such as parallel multiple sampling [1], [2], dual-gain slopes [3], and dual-gain amplifiers [4], have been investigated. However, since the clock frequency of the SS ADC is already in the GHz range, it is very challenging to maintain energy efficiency as the frame rate increases further.
UR - http://www.scopus.com/inward/record.url?scp=85063532921&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85063532921&partnerID=8YFLogxK
U2 - 10.1109/ISSCC.2019.8662388
DO - 10.1109/ISSCC.2019.8662388
M3 - Conference contribution
AN - SCOPUS:85063532921
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 100
EP - 103
BT - 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019
PB - Institute of Electrical and Electronics Engineers Inc.
ER -