A 0.18 μm CMOS 3.125-Gb/s digitally controlled adaptive line equalizer with feed-forward swing control for backplane serial link

Ki Hyuk Lee; Jae Wook Lee; Woo Young Choi

doi:10.1093/ietele/e89-c.10.1454

A 0.18 μm CMOS 3.125-Gb/s digitally controlled adaptive line equalizer with feed-forward swing control for backplane serial link

Ki Hyuk Lee, Jae Wook Lee, Woo Young Choi

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

A new compact line equalizer is proposed for backplane serial link applications. The equalizer has two control blocks. The feed-forward swing control block determines the optimal low frequency level and the feedback control block detects signal shapes and decides the high-frequency boosting level of the equalizer. Successful equalization is demonstrated over a 1.5 m long PCB trace at 3.125-Gb/s by the circuit realized with 0.18 μm CMOS process. The circuit occupies only 0.16 mm² and consumes 20 mW with 1.8 V supply.

Original language	English
Pages (from-to)	1454-1459
Number of pages	6
Journal	IEICE Transactions on Electronics
Volume	E89-C
Issue number	10
DOIs	https://doi.org/10.1093/ietele/e89-c.10.1454
Publication status	Published - 2006 Oct

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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N2 - A new compact line equalizer is proposed for backplane serial link applications. The equalizer has two control blocks. The feed-forward swing control block determines the optimal low frequency level and the feedback control block detects signal shapes and decides the high-frequency boosting level of the equalizer. Successful equalization is demonstrated over a 1.5 m long PCB trace at 3.125-Gb/s by the circuit realized with 0.18 μm CMOS process. The circuit occupies only 0.16 mm2 and consumes 20 mW with 1.8 V supply.

AB - A new compact line equalizer is proposed for backplane serial link applications. The equalizer has two control blocks. The feed-forward swing control block determines the optimal low frequency level and the feedback control block detects signal shapes and decides the high-frequency boosting level of the equalizer. Successful equalization is demonstrated over a 1.5 m long PCB trace at 3.125-Gb/s by the circuit realized with 0.18 μm CMOS process. The circuit occupies only 0.16 mm2 and consumes 20 mW with 1.8 V supply.

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A 0.18 μm CMOS 3.125-Gb/s digitally controlled adaptive line equalizer with feed-forward swing control for backplane serial link

Abstract

All Science Journal Classification (ASJC) codes

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