A 10-Gb/s multiphase clock and data recovery circuit with a rotational bang-bang phase detector

Dae Hyun Kwon, Jinsoo Rhim, Woo Young Choi

Research output: Contribution to journalArticlepeer-review

Abstract

A multiphase clock and data recovery (CDR) circuit having a novel rotational bang-bang phase detector (RBBPD) is demonstrated. The proposed 1/4-rate RBBPD decides the locking point using a single clock phase among sequentially rotating 4 clock phases. With this, our RBBPD has significantly reduced power consumption and chip area. A prototype 10-Gb/s 1/4-rate CDR with RBBPD is successfully realized in 65-nm CMOS technology. The CDR consumes 5.5 mW from 1-V supply and the clock signal recovered from 231-1 PRBS input data has 0.011-UI rms jitter.

Original languageEnglish
Pages (from-to)287-292
Number of pages6
JournalJournal of Semiconductor Technology and Science
Volume16
Issue number3
DOIs
Publication statusPublished - 2016 Jun

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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