A 100 nm copper/low-K bulk CMOS technology with multi Vt and multi gate oxide integrated transistors for low standby power, high performance and RF/analog system on chip applications

Geoffrey C.F. Yeap, J. Chen, P. Grudowski, Y. Jeon, Y. Shiho, W. Qi, S. Jallepalli, N. Ramani, K. Hellig, L. Vishnubhotla, T. Luo, H. Tseng, Y. Du, S. Lim, P. Abramowitz, C. Reddy, S. Parihar, R. Singh, M. Wright, K. PattersonN. Benavides, D. Bonser, T. V. Gompel, J. Conner, J. J. Lee, M. Rendon, D. Hall, A. Nghiem, R. Stout, K. Weidemann, A. Duvallet, J. Alvis, D. Dyer, D. Burnett, P. Ingersoll, K. Wimmer, S. Veeraraghavan, M. Foisy, M. Hall, J. Pellerin, Dirk Wristers, M. Woo, C. Lage

Research output: Contribution to conferencePaper

16 Citations (Scopus)

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