TY - JOUR
T1 - A 1.2-V 8.3-nJ CMOS humidity sensor for RFID applications
AU - Tan, Zhichao
AU - Daamen, Roel
AU - Humbert, Aurelie
AU - Ponomarev, Youri V.
AU - Chae, Youngcheol
AU - Pertijs, Michiel A.P.
N1 - Copyright:
Copyright 2013 Elsevier B.V., All rights reserved.
PY - 2013
Y1 - 2013
N2 - This paper presents a fully integrated CMOS humidity sensor for a smart RFID sensor platform. The sensing element is a CMOS-compatible capacitive humidity sensor, which consists of top-metal finger-structure electrodes covered by a humidity-sensitive polyimide layer. Its humidity-sensitive capacitance is digitized by an energy-efficient capacitance-to-digital converter (CDC) based on a third-order delta-sigma modulator. This CDC employs current-efficient operational transconductance amplifiers based on current-starved cascoded inverters, whose limited output swing is accommodated by employing a feedforward loop-filter topology. A programmable offset capacitor is included to remove the sensor's baseline capacitance and thus reduce the required dynamic range. To reduce offset errors due to charge injection of the switches, the entire system is auto-zeroed. The proposed humidity sensor has been realized in a 0.16-$\mu{\hbox{m}}$ CMOS technology. Measurement results show that the CDC performs a 12.5-bit capacitance-to-digital conversion in a measurement time of 0.8 ms, while consuming only 8.6 $\mu{\hbox{A}} $ from a 1.2-V supply. This corresponds to a state-of-the-art figure-of-merit of 1.4 pJ/conversion-step. Combined with the co-integrated humidity sensing element, it provides a resolution of 0.05% RH in the range from 30% RH to 100% RH while consuming only 8.3 nJ per measurement, which is an order-of-magnitude less energy than the state-of-the-art.
AB - This paper presents a fully integrated CMOS humidity sensor for a smart RFID sensor platform. The sensing element is a CMOS-compatible capacitive humidity sensor, which consists of top-metal finger-structure electrodes covered by a humidity-sensitive polyimide layer. Its humidity-sensitive capacitance is digitized by an energy-efficient capacitance-to-digital converter (CDC) based on a third-order delta-sigma modulator. This CDC employs current-efficient operational transconductance amplifiers based on current-starved cascoded inverters, whose limited output swing is accommodated by employing a feedforward loop-filter topology. A programmable offset capacitor is included to remove the sensor's baseline capacitance and thus reduce the required dynamic range. To reduce offset errors due to charge injection of the switches, the entire system is auto-zeroed. The proposed humidity sensor has been realized in a 0.16-$\mu{\hbox{m}}$ CMOS technology. Measurement results show that the CDC performs a 12.5-bit capacitance-to-digital conversion in a measurement time of 0.8 ms, while consuming only 8.6 $\mu{\hbox{A}} $ from a 1.2-V supply. This corresponds to a state-of-the-art figure-of-merit of 1.4 pJ/conversion-step. Combined with the co-integrated humidity sensing element, it provides a resolution of 0.05% RH in the range from 30% RH to 100% RH while consuming only 8.3 nJ per measurement, which is an order-of-magnitude less energy than the state-of-the-art.
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U2 - 10.1109/JSSC.2013.2275661
DO - 10.1109/JSSC.2013.2275661
M3 - Article
AN - SCOPUS:84884702871
VL - 48
SP - 2469
EP - 2477
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
SN - 0018-9200
IS - 10
M1 - 6584794
ER -