Abstract
Audio applications require a high-resolution ADC with a dynamic range (DR) of more than 100dB. A continuous-time delta-sigma modulator (CTDSM) is widely used to realize such ADCs and requires high energy efficiency for battery-powered devices [1-5]. This paper presents a more efficient, highly linear CTDSM architecture for audio applications. The first integrator of the CTDSM uses a chopped negative-R in conjunction with a tri-level FIR DAC to increase energy-efficiency. Non-idealities of an active-RC integrator are compensated using a negative-R at the virtual ground of the integrator, and the negative-R is then chopped to remove its 1/f noise at a notch frequency of the feedback FIR filter. A 6-tap, tri-level FIR DAC is realized with a resistive non-return-to-zero (NRZ) DAC whose inter-symbol-interference (ISI) is kept less than -120dB. As a result, this work achieves 99.4dB SNDR, 101dB SNR, 103.5dB DR, and 110.2dB SFDR in a 24kHz bandwidth while consuming only 134μW. This corresponds to a Schreier FoM of 186dB.
Original language | English |
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Title of host publication | 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 1-3 |
Number of pages | 3 |
ISBN (Electronic) | 9781728132044 |
DOIs | |
Publication status | Published - 2020 Feb |
Event | 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 - San Francisco, United States Duration: 2020 Feb 16 → 2020 Feb 20 |
Publication series
Name | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
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Volume | 2020-February |
ISSN (Print) | 0193-6530 |
Conference
Conference | 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 |
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Country/Territory | United States |
City | San Francisco |
Period | 20/2/16 → 20/2/20 |
Bibliographical note
Publisher Copyright:© 2020 IEEE.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering