A 2-D compaction method using macro block for post-silicon validation

Won Jung, Hyunggoy Oh, Dongho Kang, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

The post-silicon validation has been an important step as the complexity of system on chip (SoC) increases. Conventional trace buffer based debug methods offer consecutive observability and real time debug, but the size constraint of the trace buffer still is a challenge. The proposed method uses 2-D compaction for expanding the depth of observation window in a trace buffer. Moreover, the macro block, which is used with 2-D compaction, offers tolerance to various error patterns as a virtual window. The errors identified by the 2-D compaction using the macro block are selectively captured by using the new tag map. The experimental results show that the proposed method enables the reduction of error misidentification.

Original languageEnglish
Title of host publicationISOCC 2015 - International SoC Design Conference
Subtitle of host publicationSoC for Internet of Everything (IoE)
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages41-42
Number of pages2
ISBN (Electronic)9781467393089
DOIs
Publication statusPublished - 2016 Feb 8
Event12th International SoC Design Conference, ISOCC 2015 - Gyeongju, Korea, Republic of
Duration: 2015 Nov 22015 Nov 5

Publication series

NameISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)

Other

Other12th International SoC Design Conference, ISOCC 2015
CountryKorea, Republic of
CityGyeongju
Period15/11/215/11/5

Fingerprint

Silicon
Macros
Buffers
Compaction
Observability

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Jung, W., Oh, H., Kang, D., & Kang, S. (2016). A 2-D compaction method using macro block for post-silicon validation. In ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE) (pp. 41-42). [7401690] (ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC.2015.7401690
Jung, Won ; Oh, Hyunggoy ; Kang, Dongho ; Kang, Sungho. / A 2-D compaction method using macro block for post-silicon validation. ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE). Institute of Electrical and Electronics Engineers Inc., 2016. pp. 41-42 (ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)).
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abstract = "The post-silicon validation has been an important step as the complexity of system on chip (SoC) increases. Conventional trace buffer based debug methods offer consecutive observability and real time debug, but the size constraint of the trace buffer still is a challenge. The proposed method uses 2-D compaction for expanding the depth of observation window in a trace buffer. Moreover, the macro block, which is used with 2-D compaction, offers tolerance to various error patterns as a virtual window. The errors identified by the 2-D compaction using the macro block are selectively captured by using the new tag map. The experimental results show that the proposed method enables the reduction of error misidentification.",
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Jung, W, Oh, H, Kang, D & Kang, S 2016, A 2-D compaction method using macro block for post-silicon validation. in ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)., 7401690, ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE), Institute of Electrical and Electronics Engineers Inc., pp. 41-42, 12th International SoC Design Conference, ISOCC 2015, Gyeongju, Korea, Republic of, 15/11/2. https://doi.org/10.1109/ISOCC.2015.7401690

A 2-D compaction method using macro block for post-silicon validation. / Jung, Won; Oh, Hyunggoy; Kang, Dongho; Kang, Sungho.

ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE). Institute of Electrical and Electronics Engineers Inc., 2016. p. 41-42 7401690 (ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Jung W, Oh H, Kang D, Kang S. A 2-D compaction method using macro block for post-silicon validation. In ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE). Institute of Electrical and Electronics Engineers Inc. 2016. p. 41-42. 7401690. (ISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)). https://doi.org/10.1109/ISOCC.2015.7401690