A 4.8-Gb/s mixed-mode CMOS QPSK demodulator for 60-GHz wireless personal area networks

Duho Kim, Minsu Ko, Kwang Chun Choi, Woo-Young Choi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

A mixed-mode QPSK demodulator for 60-GHz wireless personal area network application is demonstrated. The prototype chip realized by 60-nm CMOS process can demodulate up to 4.8-Gb/s QPSK signals at 4.8-GHz carrier frequency. At this carrier frequency, the demodulator core consumes 54 mW from 1.2-V power supply while the chip area is 150 × 150 μm2. Using the fabricated chip, transmission and demodulation of 1.7-GSymbol/s QPSK signal in 60-GHz link is demonstrated.

Original languageEnglish
Title of host publicationProceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
Pages60-63
Number of pages4
DOIs
Publication statusPublished - 2010 Dec 1
Event2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur, Malaysia
Duration: 2010 Dec 62010 Dec 9

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

Other2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
CountryMalaysia
CityKuala Lumpur
Period10/12/610/12/9

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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    Kim, D., Ko, M., Choi, K. C., & Choi, W-Y. (2010). A 4.8-Gb/s mixed-mode CMOS QPSK demodulator for 60-GHz wireless personal area networks. In Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 (pp. 60-63). [5774815] (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2010.5774815