A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology

Jinsoo Rhim, Woo Young Choi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

A 5-Gb/s low-power transmitter having an output impedance calibration circuit and a voltage-mode output driver is implemented for high-speed serial link applications. The output impedance calibration circuit matches the output impedance of output driver to the characteristic impedance of the channel. This transmitter includes 32:1 serializer based on voltage-mode logic which operates successfully at 5-Gb/s. In addition, on-chip parallel PRBS7 (2 7-1) generator is implemented for testing. The transmitter consumes 8.6mW with 300mVp-p output swing and occupies 60 μm X 70 μm of area.

Original languageEnglish
Title of host publication2011 International SoC Design Conference, ISOCC 2011
Pages231-234
Number of pages4
Publication statusPublished - 2011 Dec 1
Event8th International SoC Design Conference 2011, ISOCC 2011 - Jeju, Korea, Republic of
Duration: 2011 Nov 172011 Nov 18

Publication series

Name2011 International SoC Design Conference, ISOCC 2011

Other

Other8th International SoC Design Conference 2011, ISOCC 2011
CountryKorea, Republic of
CityJeju
Period11/11/1711/11/18

Fingerprint

Transmitters
Electric potential
Calibration
Networks (circuits)
Testing

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Rhim, J., & Choi, W. Y. (2011). A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology. In 2011 International SoC Design Conference, ISOCC 2011 (pp. 231-234). (2011 International SoC Design Conference, ISOCC 2011).
Rhim, Jinsoo ; Choi, Woo Young. / A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology. 2011 International SoC Design Conference, ISOCC 2011. 2011. pp. 231-234 (2011 International SoC Design Conference, ISOCC 2011).
@inproceedings{d6568c0605ce42ad9d6e416557e9231f,
title = "A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology",
abstract = "A 5-Gb/s low-power transmitter having an output impedance calibration circuit and a voltage-mode output driver is implemented for high-speed serial link applications. The output impedance calibration circuit matches the output impedance of output driver to the characteristic impedance of the channel. This transmitter includes 32:1 serializer based on voltage-mode logic which operates successfully at 5-Gb/s. In addition, on-chip parallel PRBS7 (2 7-1) generator is implemented for testing. The transmitter consumes 8.6mW with 300mVp-p output swing and occupies 60 μm X 70 μm of area.",
author = "Jinsoo Rhim and Choi, {Woo Young}",
year = "2011",
month = "12",
day = "1",
language = "English",
isbn = "9781457707100",
series = "2011 International SoC Design Conference, ISOCC 2011",
pages = "231--234",
booktitle = "2011 International SoC Design Conference, ISOCC 2011",

}

Rhim, J & Choi, WY 2011, A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology. in 2011 International SoC Design Conference, ISOCC 2011. 2011 International SoC Design Conference, ISOCC 2011, pp. 231-234, 8th International SoC Design Conference 2011, ISOCC 2011, Jeju, Korea, Republic of, 11/11/17.

A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology. / Rhim, Jinsoo; Choi, Woo Young.

2011 International SoC Design Conference, ISOCC 2011. 2011. p. 231-234 (2011 International SoC Design Conference, ISOCC 2011).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology

AU - Rhim, Jinsoo

AU - Choi, Woo Young

PY - 2011/12/1

Y1 - 2011/12/1

N2 - A 5-Gb/s low-power transmitter having an output impedance calibration circuit and a voltage-mode output driver is implemented for high-speed serial link applications. The output impedance calibration circuit matches the output impedance of output driver to the characteristic impedance of the channel. This transmitter includes 32:1 serializer based on voltage-mode logic which operates successfully at 5-Gb/s. In addition, on-chip parallel PRBS7 (2 7-1) generator is implemented for testing. The transmitter consumes 8.6mW with 300mVp-p output swing and occupies 60 μm X 70 μm of area.

AB - A 5-Gb/s low-power transmitter having an output impedance calibration circuit and a voltage-mode output driver is implemented for high-speed serial link applications. The output impedance calibration circuit matches the output impedance of output driver to the characteristic impedance of the channel. This transmitter includes 32:1 serializer based on voltage-mode logic which operates successfully at 5-Gb/s. In addition, on-chip parallel PRBS7 (2 7-1) generator is implemented for testing. The transmitter consumes 8.6mW with 300mVp-p output swing and occupies 60 μm X 70 μm of area.

UR - http://www.scopus.com/inward/record.url?scp=84857398237&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84857398237&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:84857398237

SN - 9781457707100

T3 - 2011 International SoC Design Conference, ISOCC 2011

SP - 231

EP - 234

BT - 2011 International SoC Design Conference, ISOCC 2011

ER -

Rhim J, Choi WY. A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology. In 2011 International SoC Design Conference, ISOCC 2011. 2011. p. 231-234. (2011 International SoC Design Conference, ISOCC 2011).