A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology

Jinsoo Rhim, Woo Young Choi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

A 5-Gb/s low-power transmitter having an output impedance calibration circuit and a voltage-mode output driver is implemented for high-speed serial link applications. The output impedance calibration circuit matches the output impedance of output driver to the characteristic impedance of the channel. This transmitter includes 32:1 serializer based on voltage-mode logic which operates successfully at 5-Gb/s. In addition, on-chip parallel PRBS7 (2 7-1) generator is implemented for testing. The transmitter consumes 8.6mW with 300mVp-p output swing and occupies 60 μm X 70 μm of area.

Original languageEnglish
Title of host publication2011 International SoC Design Conference, ISOCC 2011
Pages231-234
Number of pages4
Publication statusPublished - 2011 Dec 1
Event8th International SoC Design Conference 2011, ISOCC 2011 - Jeju, Korea, Republic of
Duration: 2011 Nov 172011 Nov 18

Publication series

Name2011 International SoC Design Conference, ISOCC 2011

Other

Other8th International SoC Design Conference 2011, ISOCC 2011
CountryKorea, Republic of
CityJeju
Period11/11/1711/11/18

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All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Rhim, J., & Choi, W. Y. (2011). A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology. In 2011 International SoC Design Conference, ISOCC 2011 (pp. 231-234). (2011 International SoC Design Conference, ISOCC 2011).