Abstract
This article presents a CMOS image sensor (CIS) with column-parallel single-shot compressive sensing (CS) for always-on Internet-of-Things (IoT) application, which achieves an energy efficiency of 51 pJ/pixel, while maintaining high image quality of PSNR > 33.7 dB and SSIM > 0.89. This is enabled by an energy-efficient encoder, which replaces a densely populated CS encoding matrix with a highly sparse pseudo-diagonal one. Since the proposed column-parallel CS encoder can be implemented directly at pixel outputs with an energy-efficient switched-capacitor matrix multiplier, data compression is achieved prior to the pixel digitization, thereby greatly reducing ADC power, data size, and I/O power. The energy efficiency of the image sensor is further improved by using dynamic single-slope ADCs. A prototype VGA image sensor implemented in a 110-nm CMOS process consumes only 0.7 mW at 45 frames/s. The corresponding energy per pixel (51 pJ/pixel) amounts to more than $5\times $ improvement over the previous low-energy benchmark for CS image sensors.
| Original language | English |
|---|---|
| Article number | 9424987 |
| Pages (from-to) | 2503-2515 |
| Number of pages | 13 |
| Journal | IEEE Journal of Solid-State Circuits |
| Volume | 56 |
| Issue number | 8 |
| DOIs | |
| Publication status | Published - 2021 Aug |
Bibliographical note
Funding Information:Manuscript received August 7, 2020; revised November 23, 2020 and January 26, 2021; accepted April 1, 2021. Date of publication May 6, 2021; date of current version July 23, 2021. This article was approved by Associate Editor David Stoppa. This work was supported in part by the Korea Medical Device Development Fund grant funded by the Korean Government (the Ministry of Science and ICT, the Ministry of Trade, Industry and Energy, the Ministry of Health & Welfare, and the Ministry of Food and Drug Safety) under Project KMDF_PR_20200901_0048, 9991006721. (Corresponding author: Youngcheol Chae.) Chanmin Park, Injun Park, and Youngcheol Chae are with the Department of Electrical and Electronic Engineering, Yonsei University, Seoul 03722, South Korea (e-mail: ychae@yonsei.ac.kr).
Funding Information:
ACKNOWLEDGMENT The authors would like to thank Semiconductor Research Corporation (SRC) for partial support on the presented work and IDEC for the support of EDA software.
Publisher Copyright:
© 1966-2012 IEEE.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
