A 5.28-Gb/s serializer ASIC for uncompressed long-haul multimedia interconnects

Kang Yeob Park, Won Seok Oh, Jong Chan Choi, Woo-Young Choi

Research output: Contribution to journalArticle

Abstract

We report a 5.28-Gb/s serializer ASIC for uncompressed long-haul video interconnects. Our ASIC is based on the serializer architecture which maintains the constant output data rate for various resolutions of incoming video signals from VGA to UXGA. With this, a wide-band phase-locked-loop in a serializer and a continuous-rate clock-and-data-recovery circuit in a de-serializer are not necessary. The serializer ASIC contains clock-and-data-recovery circuits, de-multiplexers, a digital processing block, a phase-locked-loop, multiplexers. A VCSEL driver circuit is also integrated so that it can be used for long-haul transmission with multimode fiber. The ASIC produces 5.28-Gb/s serialized driving currents for VCSEL from parallel input signals. It occupies 3.45 mm 2 and consumes 151.7 mW.

Original languageEnglish
Pages (from-to)385-395
Number of pages11
JournalAnalog Integrated Circuits and Signal Processing
Volume73
Issue number1
DOIs
Publication statusPublished - 2012 Oct 1

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Application specific integrated circuits
Clock and data recovery circuits (CDR circuits)
Surface emitting lasers
Phase locked loops
Multimode fibers
Digital signal processing
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Signal Processing
  • Hardware and Architecture
  • Surfaces, Coatings and Films

Cite this

@article{42d408704a40409ea3de2177433b3a7a,
title = "A 5.28-Gb/s serializer ASIC for uncompressed long-haul multimedia interconnects",
abstract = "We report a 5.28-Gb/s serializer ASIC for uncompressed long-haul video interconnects. Our ASIC is based on the serializer architecture which maintains the constant output data rate for various resolutions of incoming video signals from VGA to UXGA. With this, a wide-band phase-locked-loop in a serializer and a continuous-rate clock-and-data-recovery circuit in a de-serializer are not necessary. The serializer ASIC contains clock-and-data-recovery circuits, de-multiplexers, a digital processing block, a phase-locked-loop, multiplexers. A VCSEL driver circuit is also integrated so that it can be used for long-haul transmission with multimode fiber. The ASIC produces 5.28-Gb/s serialized driving currents for VCSEL from parallel input signals. It occupies 3.45 mm 2 and consumes 151.7 mW.",
author = "Park, {Kang Yeob} and Oh, {Won Seok} and Choi, {Jong Chan} and Woo-Young Choi",
year = "2012",
month = "10",
day = "1",
doi = "10.1007/s10470-012-9899-3",
language = "English",
volume = "73",
pages = "385--395",
journal = "Analog Integrated Circuits and Signal Processing",
issn = "0925-1030",
publisher = "Springer Netherlands",
number = "1",

}

A 5.28-Gb/s serializer ASIC for uncompressed long-haul multimedia interconnects. / Park, Kang Yeob; Oh, Won Seok; Choi, Jong Chan; Choi, Woo-Young.

In: Analog Integrated Circuits and Signal Processing, Vol. 73, No. 1, 01.10.2012, p. 385-395.

Research output: Contribution to journalArticle

TY - JOUR

T1 - A 5.28-Gb/s serializer ASIC for uncompressed long-haul multimedia interconnects

AU - Park, Kang Yeob

AU - Oh, Won Seok

AU - Choi, Jong Chan

AU - Choi, Woo-Young

PY - 2012/10/1

Y1 - 2012/10/1

N2 - We report a 5.28-Gb/s serializer ASIC for uncompressed long-haul video interconnects. Our ASIC is based on the serializer architecture which maintains the constant output data rate for various resolutions of incoming video signals from VGA to UXGA. With this, a wide-band phase-locked-loop in a serializer and a continuous-rate clock-and-data-recovery circuit in a de-serializer are not necessary. The serializer ASIC contains clock-and-data-recovery circuits, de-multiplexers, a digital processing block, a phase-locked-loop, multiplexers. A VCSEL driver circuit is also integrated so that it can be used for long-haul transmission with multimode fiber. The ASIC produces 5.28-Gb/s serialized driving currents for VCSEL from parallel input signals. It occupies 3.45 mm 2 and consumes 151.7 mW.

AB - We report a 5.28-Gb/s serializer ASIC for uncompressed long-haul video interconnects. Our ASIC is based on the serializer architecture which maintains the constant output data rate for various resolutions of incoming video signals from VGA to UXGA. With this, a wide-band phase-locked-loop in a serializer and a continuous-rate clock-and-data-recovery circuit in a de-serializer are not necessary. The serializer ASIC contains clock-and-data-recovery circuits, de-multiplexers, a digital processing block, a phase-locked-loop, multiplexers. A VCSEL driver circuit is also integrated so that it can be used for long-haul transmission with multimode fiber. The ASIC produces 5.28-Gb/s serialized driving currents for VCSEL from parallel input signals. It occupies 3.45 mm 2 and consumes 151.7 mW.

UR - http://www.scopus.com/inward/record.url?scp=84866742324&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84866742324&partnerID=8YFLogxK

U2 - 10.1007/s10470-012-9899-3

DO - 10.1007/s10470-012-9899-3

M3 - Article

VL - 73

SP - 385

EP - 395

JO - Analog Integrated Circuits and Signal Processing

JF - Analog Integrated Circuits and Signal Processing

SN - 0925-1030

IS - 1

ER -