A 55μW 93.1dB-DR 20kHz-BW single-bit CT ΔΣ modulator with negative R-assisted integrator achieving 178.7dB FoM in 65nm CMOS

Moonhyung Jang; Sangwoo Lee; Youngcheol Chae

doi:10.23919/VLSIC.2017.8008540

A 55μW 93.1dB-DR 20kHz-BW single-bit CT ΔΣ modulator with negative R-assisted integrator achieving 178.7dB FoM in 65nm CMOS

Moonhyung Jang, Sangwoo Lee, Youngcheol Chae

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

10 Citations (Scopus)

Abstract

This paper presents a 3^rd order single-bit CT ΔΣ modulator with active-RC integrators using negative-R assistant at virtual ground, which mitigates opamp's requirements including the thermal noise and linearity leading to a drastic power-saving. Fabricated in a 65nm CMOS process, the modulator occupies area of 0.27mm². It achieves 100.5dB SFDR and 93.1dB DR in 20kHz BW, while consuming only 55μW from a 1.2V supply. This results in Schreier FoM of 178.7dB and Walden FoM of 63.1fJ/step.

Original language	English
Title of host publication	2017 Symposium on VLSI Circuits, VLSI Circuits 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	C40-C41
ISBN (Electronic)	9784863486065
DOIs	https://doi.org/10.23919/VLSIC.2017.8008540
Publication status	Published - 2017 Aug 10
Event	31st Symposium on VLSI Circuits, VLSI Circuits 2017 - Kyoto, Japan Duration: 2017 Jun 5 → 2017 Jun 8

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other	31st Symposium on VLSI Circuits, VLSI Circuits 2017
Country/Territory	Japan
City	Kyoto
Period	17/6/5 → 17/6/8

Bibliographical note

Publisher Copyright:
© 2017 JSAP.

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.23919/VLSIC.2017.8008540

Cite this

Jang, M., Lee, S., & Chae, Y. (2017). A 55μW 93.1dB-DR 20kHz-BW single-bit CT ΔΣ modulator with negative R-assisted integrator achieving 178.7dB FoM in 65nm CMOS. In 2017 Symposium on VLSI Circuits, VLSI Circuits 2017 (pp. C40-C41). [8008540] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/VLSIC.2017.8008540

Jang, Moonhyung ; Lee, Sangwoo ; Chae, Youngcheol. / A 55μW 93.1dB-DR 20kHz-BW single-bit CT ΔΣ modulator with negative R-assisted integrator achieving 178.7dB FoM in 65nm CMOS. 2017 Symposium on VLSI Circuits, VLSI Circuits 2017. Institute of Electrical and Electronics Engineers Inc., 2017. pp. C40-C41 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

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abstract = "This paper presents a 3rd order single-bit CT ΔΣ modulator with active-RC integrators using negative-R assistant at virtual ground, which mitigates opamp's requirements including the thermal noise and linearity leading to a drastic power-saving. Fabricated in a 65nm CMOS process, the modulator occupies area of 0.27mm2. It achieves 100.5dB SFDR and 93.1dB DR in 20kHz BW, while consuming only 55μW from a 1.2V supply. This results in Schreier FoM of 178.7dB and Walden FoM of 63.1fJ/step.",

author = "Moonhyung Jang and Sangwoo Lee and Youngcheol Chae",

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Jang, M, Lee, S & Chae, Y 2017, A 55μW 93.1dB-DR 20kHz-BW single-bit CT ΔΣ modulator with negative R-assisted integrator achieving 178.7dB FoM in 65nm CMOS. in 2017 Symposium on VLSI Circuits, VLSI Circuits 2017., 8008540, IEEE Symposium on VLSI Circuits, Digest of Technical Papers, Institute of Electrical and Electronics Engineers Inc., pp. C40-C41, 31st Symposium on VLSI Circuits, VLSI Circuits 2017, Kyoto, Japan, 17/6/5. https://doi.org/10.23919/VLSIC.2017.8008540

A 55μW 93.1dB-DR 20kHz-BW single-bit CT ΔΣ modulator with negative R-assisted integrator achieving 178.7dB FoM in 65nm CMOS. / Jang, Moonhyung; Lee, Sangwoo; Chae, Youngcheol.

2017 Symposium on VLSI Circuits, VLSI Circuits 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. C40-C41 8008540 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - This paper presents a 3rd order single-bit CT ΔΣ modulator with active-RC integrators using negative-R assistant at virtual ground, which mitigates opamp's requirements including the thermal noise and linearity leading to a drastic power-saving. Fabricated in a 65nm CMOS process, the modulator occupies area of 0.27mm2. It achieves 100.5dB SFDR and 93.1dB DR in 20kHz BW, while consuming only 55μW from a 1.2V supply. This results in Schreier FoM of 178.7dB and Walden FoM of 63.1fJ/step.

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Jang M, Lee S, Chae Y. A 55μW 93.1dB-DR 20kHz-BW single-bit CT ΔΣ modulator with negative R-assisted integrator achieving 178.7dB FoM in 65nm CMOS. In 2017 Symposium on VLSI Circuits, VLSI Circuits 2017. Institute of Electrical and Electronics Engineers Inc. 2017. p. C40-C41. 8008540. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers). doi: 10.23919/VLSIC.2017.8008540

A 55μW 93.1dB-DR 20kHz-BW single-bit CT ΔΣ modulator with negative R-assisted integrator achieving 178.7dB FoM in 65nm CMOS

Abstract

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