A capacitance desensitization technique is proposed for a multiple gated transistors amplifier with source degeneration to relax second-order distortion contribution to a third-order intermodulation distortion (IMD3), as well as an induced-gate noise contribution to noise figure. An extra capacitance, which is added between gate and source nodes of input transistors in a parallel manner, can desensitize the contribution of second-order harmonic feedback to IMD3. The capacitance is useful for optimizing noise figure, as well by controlling the input matching network quality factor (Q), which can desensitize the induced-gate noise contribution to noise figure. The low-noise amplifier is implemented with the proposed technique using 1P6M 0.18- μm CMOS technology for 900-MHz code division multiple access (CDMA) receivers. It shows a third-order intercept point of +9.4 dBm and noise figure of 1.8 dB while consuming 5.5 mW at 1.5 V.
|Number of pages||9|
|Journal||IEEE Transactions on Microwave Theory and Techniques|
|Publication status||Published - 2010 Oct|
Bibliographical noteFunding Information:
Manuscript received October 07, 2009; revised June 07, 2010; accepted June 30, 2010. Date of publication September 02, 2010; date of current version October 13, 2010. This work was supported by the Mid-career Researcher Program through a National Research Foundation (NRF) Grant funded by the Ministry of Education, Science and Technology (MEST) (2010-0012315).
All Science Journal Classification (ASJC) codes
- Condensed Matter Physics
- Electrical and Electronic Engineering