A 6.24-Gb/s wide-input-range serializer ASIC using fixed-data-rate scheme

Kang Yeob Park, Woo Young Choi, Seon Young Lee, Won Seok Oh

Research output: Contribution to conferencePaperpeer-review

2 Citations (Scopus)

Abstract

In this paper, we report a 6.24-Gb/s wide-input-range serializer ASIC using fixed-data-rate scheme that can be used for long-haul optical transmission of various display standards. The serializer includes three clock-and-data-recovery circuits, de-multiplexers, a digital processing block, a phase-locked-loop, multiplexers, and optical front-end circuits. To eliminate the need for a wide-range phase-locked loop, the fixed-data-rate scheme is used. The ASIC produces 6.24-Gb/s serialized data from parallel input signals and, with them, drives a vertical-cavity surface-emitting laser. The serializer ASIC occupies 3.45 mm2 and consumes 151.7 mW.

Original languageEnglish
Pages1704-1707
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of
Duration: 2012 May 202012 May 23

Other

Other2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
CountryKorea, Republic of
CitySeoul
Period12/5/2012/5/23

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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