This paper presents a 640× 640 fully dynamic CMOS image sensor for always-on object recognition. A pixel output is sampled with a dynamic source follower (SF) into a parasitic column capacitor, which is readout by a dynamic single-slope (SS) ADC based on a dynamic bias comparator and an energy-efficient two-step counter. The sensor, implemented in a 0.11μm CMOS, achieves 0.3% peak non-linearity, 6.8e-rms- RN and 67dB DR. Its power consumption is only 2.1mW at 44fps and is further reduced to 260μW at 15fps with sub-sampled 320 × 320 mode. This work achieves the state-of-the-art energy-efficiency FoM of 0.7e-\cdot nJ.
|Title of host publication||2019 Symposium on VLSI Circuits, VLSI Circuits 2019 - Digest of Technical Papers|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Publication status||Published - 2019 Jun|
|Event||33rd Symposium on VLSI Circuits, VLSI Circuits 2019 - Kyoto, Japan|
Duration: 2019 Jun 9 → 2019 Jun 14
|Name||IEEE Symposium on VLSI Circuits, Digest of Technical Papers|
|Conference||33rd Symposium on VLSI Circuits, VLSI Circuits 2019|
|Period||19/6/9 → 19/6/14|
Bibliographical noteFunding Information:
This work was supported by Intromedic Co. LTD. The authors would like to thank the Rohde & Schwarz for test instruments.
© 2019 JSAP.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering