A 6.5-μW 10-kHz BW 80.4-dB SNDR Gm-C-Based CT ∑ Modulator with a Feedback-Assisted GmLinearization for Artifact-Tolerant Neural Recording

Changuk Lee; Taejune Jeon; Moonhyung Jang; Sanggeon Park; Jejung Kim; Jeongsik Lim; Jong Hyun Ahn; Yeowool Huh; Youngcheol Chae

doi:10.1109/JSSC.2020.3018478

A 6.5-μW 10-kHz BW 80.4-dB SNDR G_m-C-Based CT ∑ Modulator with a Feedback-Assisted G_mLinearization for Artifact-Tolerant Neural Recording

Changuk Lee, Taejune Jeon, Moonhyung Jang, Sanggeon Park, Jejung Kim, Jeongsik Lim, Jong Hyun Ahn, Yeowool Huh, Youngcheol Chae

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

27 Citations (Scopus)

Abstract

This article presents a Gm-C-based continuous-time delta-sigma modulator (CTDSM) for artifact-tolerant neural recording interfaces. We propose the feedback-assisted Gm linearization technique, which is applied to the first Gm-C integrator by using a resistive feedback digital-to-analog converter (DAC) in parallel to the degeneration resistor of the input Gm. This enables the input Gm to process the quantization noise, thereby improving the input range and linearity of the Gm-C-based CTDSM, significantly. An energy-efficient second-order loop filter is realized by using a voltage-controlled oscillator (VCO) as the second integrator and a phase quantizer. A proportional-integral (PI) transfer function is employed at the first integrator, which minimizes the output swing while maintaining loop stability. Fabricated in a 110-nm CMOS process, the prototype CTDSM achieves a high input impedance, 300-mVpp linear input range, 80.4-dB signal-to-noise and distortion ratio (SNDR), 81-dB dynamic range (DR), and 76-dB common-mode rejection ratio (CMRR) and consumes only 6.5 \mu \text{W} with a signal bandwidth of 10 kHz. This corresponds to a figure of merit (FoM) of 172.3 dB, which is the state of the art among the neural recording ADCs. This work is also validated through the in vivo experiment.

Original language	English
Article number	9186294
Pages (from-to)	2889-2901
Number of pages	13
Journal	IEEE Journal of Solid-State Circuits
Volume	55
Issue number	11
DOIs	https://doi.org/10.1109/JSSC.2020.3018478
Publication status	Published - 2020 Nov

Bibliographical note

Funding Information:
Manuscript received April 27, 2020; revised July 12, 2020; accepted August 10, 2020. Date of publication September 3, 2020; date of current version October 23, 2020. This article was approved by Associate Editor Pedram Mohseni. This work was supported in part by the Samsung Research Funding & Incubation Center of Samsung Electronics under Grant SRFC-IT1701-08, in part by the Technology Innovation Program under Grant 20012355 (Fully Implantable Closed Loop Brain to X for Voice Communication) funded By the Ministry of Trade, Industry & Energy (MOTIE), South Korea, and in part by the Brain Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT & Future Planning under Grant 2018M3C7A1024736. (Corresponding author: Youngcheol Chae.) Changuk Lee, Taejune Jeon, MoonHyung Jang, Jejung Kim, Jeongsik Lim, Jong-Hyun Ahn, and Youngcheol Chae are with the Department of Electrical and Electronic Engineering, Yonsei University, Seoul 03722, South Korea (e-mail: ychae@yonsei.ac.kr).

Publisher Copyright:
© 1966-2012 IEEE.

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/JSSC.2020.3018478

Cite this

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title = "A 6.5-μW 10-kHz BW 80.4-dB SNDR Gm-C-Based CT ∑ Modulator with a Feedback-Assisted GmLinearization for Artifact-Tolerant Neural Recording",

abstract = "This article presents a Gm-C-based continuous-time delta-sigma modulator (CTDSM) for artifact-tolerant neural recording interfaces. We propose the feedback-assisted Gm linearization technique, which is applied to the first Gm-C integrator by using a resistive feedback digital-to-analog converter (DAC) in parallel to the degeneration resistor of the input Gm. This enables the input Gm to process the quantization noise, thereby improving the input range and linearity of the Gm-C-based CTDSM, significantly. An energy-efficient second-order loop filter is realized by using a voltage-controlled oscillator (VCO) as the second integrator and a phase quantizer. A proportional-integral (PI) transfer function is employed at the first integrator, which minimizes the output swing while maintaining loop stability. Fabricated in a 110-nm CMOS process, the prototype CTDSM achieves a high input impedance, 300-mVpp linear input range, 80.4-dB signal-to-noise and distortion ratio (SNDR), 81-dB dynamic range (DR), and 76-dB common-mode rejection ratio (CMRR) and consumes only 6.5 \mu \text{W} with a signal bandwidth of 10 kHz. This corresponds to a figure of merit (FoM) of 172.3 dB, which is the state of the art among the neural recording ADCs. This work is also validated through the in vivo experiment.",

author = "Changuk Lee and Taejune Jeon and Moonhyung Jang and Sanggeon Park and Jejung Kim and Jeongsik Lim and Ahn, {Jong Hyun} and Yeowool Huh and Youngcheol Chae",

note = "Funding Information: Manuscript received April 27, 2020; revised July 12, 2020; accepted August 10, 2020. Date of publication September 3, 2020; date of current version October 23, 2020. This article was approved by Associate Editor Pedram Mohseni. This work was supported in part by the Samsung Research Funding & Incubation Center of Samsung Electronics under Grant SRFC-IT1701-08, in part by the Technology Innovation Program under Grant 20012355 (Fully Implantable Closed Loop Brain to X for Voice Communication) funded By the Ministry of Trade, Industry & Energy (MOTIE), South Korea, and in part by the Brain Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT & Future Planning under Grant 2018M3C7A1024736. (Corresponding author: Youngcheol Chae.) Changuk Lee, Taejune Jeon, MoonHyung Jang, Jejung Kim, Jeongsik Lim, Jong-Hyun Ahn, and Youngcheol Chae are with the Department of Electrical and Electronic Engineering, Yonsei University, Seoul 03722, South Korea (e-mail: ychae@yonsei.ac.kr). Publisher Copyright: {\textcopyright} 1966-2012 IEEE.",

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AU - Lee, Changuk

AU - Jeon, Taejune

AU - Jang, Moonhyung

AU - Park, Sanggeon

AU - Kim, Jejung

AU - Lim, Jeongsik

AU - Ahn, Jong Hyun

AU - Huh, Yeowool

AU - Chae, Youngcheol

N1 - Funding Information: Manuscript received April 27, 2020; revised July 12, 2020; accepted August 10, 2020. Date of publication September 3, 2020; date of current version October 23, 2020. This article was approved by Associate Editor Pedram Mohseni. This work was supported in part by the Samsung Research Funding & Incubation Center of Samsung Electronics under Grant SRFC-IT1701-08, in part by the Technology Innovation Program under Grant 20012355 (Fully Implantable Closed Loop Brain to X for Voice Communication) funded By the Ministry of Trade, Industry & Energy (MOTIE), South Korea, and in part by the Brain Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT & Future Planning under Grant 2018M3C7A1024736. (Corresponding author: Youngcheol Chae.) Changuk Lee, Taejune Jeon, MoonHyung Jang, Jejung Kim, Jeongsik Lim, Jong-Hyun Ahn, and Youngcheol Chae are with the Department of Electrical and Electronic Engineering, Yonsei University, Seoul 03722, South Korea (e-mail: ychae@yonsei.ac.kr). Publisher Copyright: © 1966-2012 IEEE.

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AB - This article presents a Gm-C-based continuous-time delta-sigma modulator (CTDSM) for artifact-tolerant neural recording interfaces. We propose the feedback-assisted Gm linearization technique, which is applied to the first Gm-C integrator by using a resistive feedback digital-to-analog converter (DAC) in parallel to the degeneration resistor of the input Gm. This enables the input Gm to process the quantization noise, thereby improving the input range and linearity of the Gm-C-based CTDSM, significantly. An energy-efficient second-order loop filter is realized by using a voltage-controlled oscillator (VCO) as the second integrator and a phase quantizer. A proportional-integral (PI) transfer function is employed at the first integrator, which minimizes the output swing while maintaining loop stability. Fabricated in a 110-nm CMOS process, the prototype CTDSM achieves a high input impedance, 300-mVpp linear input range, 80.4-dB signal-to-noise and distortion ratio (SNDR), 81-dB dynamic range (DR), and 76-dB common-mode rejection ratio (CMRR) and consumes only 6.5 \mu \text{W} with a signal bandwidth of 10 kHz. This corresponds to a figure of merit (FoM) of 172.3 dB, which is the state of the art among the neural recording ADCs. This work is also validated through the in vivo experiment.

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