Abstract
The 77-81GHz power amplifier is designed using a 28nm CMOS process. The circuit is designed with cascode technique for a drive stage and neutralization technique for a power stage. Each stage consists of a matching network with transformer and inductors. The simulated maximum output power is 7.6 dBm, and the maximum power efficiency is 8%. The small signal gain at 77 GHz obtained from the simulation is 16.7 dB. The designed power amplifier of 1V of the supply power consumes 66mW of DC power.
Original language | English |
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Title of host publication | 2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781665408578 |
DOIs | |
Publication status | Published - 2021 |
Event | 2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021 - Gangwon, Korea, Republic of Duration: 2021 Nov 1 → 2021 Nov 3 |
Publication series
Name | 2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021 |
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Conference
Conference | 2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021 |
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Country/Territory | Korea, Republic of |
City | Gangwon |
Period | 21/11/1 → 21/11/3 |
Bibliographical note
Funding Information:This work was supported by Samsung Electronics Co. Ltd. (2020-11-1539). The CAD tool was supported by KAIST IDEC.
Publisher Copyright:
© 2021 IEEE.
All Science Journal Classification (ASJC) codes
- Instrumentation
- Computer Networks and Communications
- Signal Processing
- Electrical and Electronic Engineering