The 77-81GHz power amplifier is designed using a 28nm CMOS process. The circuit is designed with cascode technique for a drive stage and neutralization technique for a power stage. Each stage consists of a matching network with transformer and inductors. The simulated maximum output power is 7.6 dBm, and the maximum power efficiency is 8%. The small signal gain at 77 GHz obtained from the simulation is 16.7 dB. The designed power amplifier of 1V of the supply power consumes 66mW of DC power.
|Title of host publication||2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Publication status||Published - 2021|
|Event||2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021 - Gangwon, Korea, Republic of|
Duration: 2021 Nov 1 → 2021 Nov 3
|Name||2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021|
|Conference||2021 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2021|
|Country/Territory||Korea, Republic of|
|Period||21/11/1 → 21/11/3|
Bibliographical noteFunding Information:
This work was supported by Samsung Electronics Co. Ltd. (2020-11-1539). The CAD tool was supported by KAIST IDEC.
© 2021 IEEE.
All Science Journal Classification (ASJC) codes
- Computer Networks and Communications
- Signal Processing
- Electrical and Electronic Engineering