A 990-μW 1.6-GHz PLL based on a novel supply-regulated active-loop-filter VCO

Kwang Chun Choi, Sung Geun Kim, Seung Woo Lee, Bhum Cheol Lee, Woo Young Choi

Research output: Contribution to journalArticle

9 Citations (Scopus)

Abstract

A low-power 1.6-GHz phase-locked loop (PLL) based on a novel supply-regulated voltage-controlled oscillator (SR-VCO) including an active-loop filter (ALF) is realized. In this PLL, an active $RC$ filter is combined with SR-VCO, achieving the advantages of ALF PLL without penalties in power consumption or phase noises. The PLL has measured rms jitter of 4.82 ps, and its core consumes 990 μW from 1-V supply while the chip area is 420 × 570μm2 including on-chip passive components required for the ALF and the supply regulator.

Original languageEnglish
Article number6518184
Pages (from-to)311-315
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume60
Issue number6
DOIs
Publication statusPublished - 2013

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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