A banked-promotion TLB for high performance and low power

Jung Hoon Lee, Jang Soo Lee, Seh Woong Jeong, Shin-Dug Kim

Research output: Contribution to journalArticle

16 Citations (Scopus)

Abstract

This research is to design a simple but high performance TLB (translation lookaside buffer) system with low power consumption. Thus, we propose a new TLB structure supporting two page sizes dynamically and selectively for high performance and low cost design without any operating system support. For high performance, a promotion-TLB is designed by supporting two page sizes. Also in order to attain low power consumption, a banked-TLB is constructed by dividing one fully associative TLB space into two sub-fully associative TLBs. These two structures are integrated to form a banked-promotion TLB as a low power and high performance TLB structure for embedded processors. According to the results of comparison and analysis, a similar performance can be achieved by using fewer TLB entries and also energy dissipation can be reduced by around 50% comparing with the fully associative TLB.

Original languageEnglish
Article number20
Pages (from-to)118-123
Number of pages6
JournalProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
DOIs
Publication statusPublished - 2001 Jan 1

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Electric power utilization
Energy dissipation
Costs

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

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A banked-promotion TLB for high performance and low power. / Lee, Jung Hoon; Lee, Jang Soo; Jeong, Seh Woong; Kim, Shin-Dug.

In: Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, 01.01.2001, p. 118-123.

Research output: Contribution to journalArticle

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