A CMOS Complementary Common Gate Capacitive Cross-Coupled Frequency Doubler

Junyoung Jang, Hyunwoong Lim, Tae Wook Kim

Research output: Contribution to journalArticlepeer-review


This brief proposes a complementary common gate frequency doubler with a cross-coupling technique for conversion gain enhancement. The proposed frequency doubler enables a low-power and high-conversion-gain operation by implementing a current-reuse technique through a complementary architecture and a transconductance enhancement technique based on cross-coupling. The cross-coupling technique increases the effective input voltage by two times, resulting in a four-fold increase in the conversion gain. In this manner, the proposed technique can achieve a high conversion gain with low power consumption. A prototype frequency doubler is fabricated in a 28-nm CMOS SOI. Measurement results show a peak conversion gain of -1.41 dB at an output frequency of 79 GHz with a power consumption of 9.23 mW.

Original languageEnglish
Pages (from-to)3694-3698
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Issue number9
Publication statusPublished - 2022 Sept 1

Bibliographical note

Publisher Copyright:
© 2004-2012 IEEE.

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering


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