A CMOS Four Quadrant Current/Transconductance Multiplier

Alejandro Diaz-Sanchez, Jaime Ramírez-Angulo, Edgar Sánchez-Sinencio, Gunhee Han

Research output: Contribution to journalArticle

8 Citations (Scopus)

Abstract

This paper describes a highly linear current four quadrant multiplier. The circuit is designed to operate in a fully differential way. It is based on the square-law characteristic of MOS transistors in saturation region. Experimental results for 2 μm CMOS technology are provided.

Original languageEnglish
Pages (from-to)163-168
Number of pages6
JournalAnalog Integrated Circuits and Signal Processing
Volume19
Issue number2
DOIs
Publication statusPublished - 1999 Jan 1

Fingerprint

Transconductance
MOSFET devices
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Signal Processing
  • Hardware and Architecture
  • Surfaces, Coatings and Films

Cite this

Diaz-Sanchez, Alejandro ; Ramírez-Angulo, Jaime ; Sánchez-Sinencio, Edgar ; Han, Gunhee. / A CMOS Four Quadrant Current/Transconductance Multiplier. In: Analog Integrated Circuits and Signal Processing. 1999 ; Vol. 19, No. 2. pp. 163-168.
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A CMOS Four Quadrant Current/Transconductance Multiplier. / Diaz-Sanchez, Alejandro; Ramírez-Angulo, Jaime; Sánchez-Sinencio, Edgar; Han, Gunhee.

In: Analog Integrated Circuits and Signal Processing, Vol. 19, No. 2, 01.01.1999, p. 163-168.

Research output: Contribution to journalArticle

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