A CMOS RF programmable-gain amplifier for digital TV with a +9-dBm IIP3 cross-coupled common-gate LNA

Hong Gul Han, Tae Wook Kim

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

A CMOS RF programmable-gain amplifier (RFPGA) is designed for a digital television receiver. In order to obtain high linearity with wide bandwidth, a common-gate (CG) low-noise amplifier (LNA) with transconductance nonlinearity cancelation is proposed for the RFPGA. The proposed LNA achieves high linearity while maintaining low-noise and low-power characteristics by applying a g m″ nonlinearity cancelation technique to the cross-coupled CG configuration. The proposed RFPGA is designed with a 0.13-μm CMOS process and measured. The measurement result at maximum gain mode shows a gain of 17.5-19.8 dB, a noise figure of 1.9-3.9 dB, an input-referred third-order intercept point of 6-9.1 dBm, an input-referred second-order intercept point of 22.4-25 dBm, and an input impedance matching of less than - 10 dB over the range of 48-860 MHz with 5.4-mW power consumption at a 1.8-V supply voltage. The total gain range of the proposed RFPGA covers 55 dB with a 1-dB resolution.

Original languageEnglish
Article number6253234
Pages (from-to)543-547
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume59
Issue number9
DOIs
Publication statusPublished - 2012 Aug 7

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Low noise amplifiers
Television receivers
Digital television
Noise figure
Transconductance
Electric power utilization
Bandwidth
Electric potential

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

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abstract = "A CMOS RF programmable-gain amplifier (RFPGA) is designed for a digital television receiver. In order to obtain high linearity with wide bandwidth, a common-gate (CG) low-noise amplifier (LNA) with transconductance nonlinearity cancelation is proposed for the RFPGA. The proposed LNA achieves high linearity while maintaining low-noise and low-power characteristics by applying a g m″ nonlinearity cancelation technique to the cross-coupled CG configuration. The proposed RFPGA is designed with a 0.13-μm CMOS process and measured. The measurement result at maximum gain mode shows a gain of 17.5-19.8 dB, a noise figure of 1.9-3.9 dB, an input-referred third-order intercept point of 6-9.1 dBm, an input-referred second-order intercept point of 22.4-25 dBm, and an input impedance matching of less than - 10 dB over the range of 48-860 MHz with 5.4-mW power consumption at a 1.8-V supply voltage. The total gain range of the proposed RFPGA covers 55 dB with a 1-dB resolution.",
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A CMOS RF programmable-gain amplifier for digital TV with a +9-dBm IIP3 cross-coupled common-gate LNA. / Han, Hong Gul; Kim, Tae Wook.

In: IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 59, No. 9, 6253234, 07.08.2012, p. 543-547.

Research output: Contribution to journalArticle

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