A CMOS RF programmable-gain amplifier (RFPGA) is designed for a digital television receiver. In order to obtain high linearity with wide bandwidth, a common-gate (CG) low-noise amplifier (LNA) with transconductance nonlinearity cancelation is proposed for the RFPGA. The proposed LNA achieves high linearity while maintaining low-noise and low-power characteristics by applying a g m″ nonlinearity cancelation technique to the cross-coupled CG configuration. The proposed RFPGA is designed with a 0.13-μm CMOS process and measured. The measurement result at maximum gain mode shows a gain of 17.5-19.8 dB, a noise figure of 1.9-3.9 dB, an input-referred third-order intercept point of 6-9.1 dBm, an input-referred second-order intercept point of 22.4-25 dBm, and an input impedance matching of less than - 10 dB over the range of 48-860 MHz with 5.4-mW power consumption at a 1.8-V supply voltage. The total gain range of the proposed RFPGA covers 55 dB with a 1-dB resolution.
|Number of pages||5|
|Journal||IEEE Transactions on Circuits and Systems II: Express Briefs|
|Publication status||Published - 2012 Aug 7|
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering