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A complexity-effective microprocessor design with decoupled dispatch queues and prefetching
Won W. Ro
, Jean Luc Gaudiot
Department of Electrical and Electronic Engineering
Research output
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Contribution to journal
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Article
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peer-review
1
Citation (Scopus)
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Mathematics
Prefetching
100%
Microprocessor
76%
Queue
53%
Design
33%
Superscalar
26%
Instruction Level Parallelism
14%
Reservation
10%
Circuit Complexity
9%
Broadcasting
9%
Hardware
8%
Architecture
7%
Benchmark
6%
Engineering & Materials Science
Microprocessor chips
48%
Clocks
34%
Broadcasting
13%
Pipelines
10%
Computer hardware
7%
Networks (circuits)
7%