The design of cyber-physical systems (CPSs) faces various new challenges that are unheard of in the design of classical real-time systems. Power optimization is one of the major design goals that is witnessing such new challenges. The presence of interaction between the cyber and physical components of a CPS leads to dependence between the time delay of a computational task and the amount of workload in the next iteration. We demonstrate that it is essential to take this delay-workload dependence into consideration in order to achieve low power consumption. In this paper, we identify this new challenge, and present the first formal and comprehensive model to enable rigorous investigations on this topic. We propose a simple power management policy, and show that this policy achieves a best possible notion of optimality. In fact, we show that the optimal power consumption is attained in a 'steady-state' operation and a simple policy of finding and entering this steady state suffices, which can be quite surprising considering the added complexity of this problem. Finally, we validated the efficiency of our policy with experiments.
|Number of pages||14|
|Journal||IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems|
|Publication status||Published - 2016 May|
Bibliographical noteFunding Information:
This work was supported in part by ICT Research and Development Program of MSIP/IITP under Grant B0101-15-0661 (the Research and Development of the Self-Adaptive Software Framework for Various IoT Devices), in part by the Basic Science Research Program through the NRF Korea funded by MSIP under Grant NRF-2013R1A2A2A01067907, and in part by the European Research Council under Grant 335288-OptApprox. A preliminary version of this paper was presented at the IEEE/ACM International Symposium on Low Power Electronics and Design in 2015 . A part of this work was conducted while H.-C. An was with the School of Computer and Communication Sciences, École Polytechnique Fédérale de Lausanne.
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All Science Journal Classification (ASJC) codes
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering