A hardware architecture for intra-prediction of H.264/AVC

Su Jin Lee, Cheong Ghil Kim, Myoung Seo Kim, Shin Dug Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Intra-prediction of H.264/AVC provides great contribution to I-picture coding efficiency by predicting pixel values from adjacent pixels. But it is one of major complexity-raising sources caused from checking 17 candidate modes for every macroblock. This paper presents a dedicated hardware structure for intra-prediction that is designed by modifying a conventional 1-D systolic array for motion estimation. Only attaching multiplexers to it, we can obtain a systolic array that can perform both intra-prediction and inter-prediction. For parallel execution, we modify the original intra-prediction algorithm slightly, but it does not nearly affect PSNR and the total size. Our architecture yields 10 to 40 times higher performance than that achieved by ARM-based systems, being compared by instruction counts for arithmetic operations.

Original languageEnglish
Title of host publicationProceedings of the 2005 International Conference on Embedded Systems and Applications, ESA'05
Pages222-228
Number of pages7
Publication statusPublished - 2005
Event2005 International Conference on Embedded Systems and Applications, ESA'05 - Las Vegas, NV, United States
Duration: 2005 Jun 272005 Jun 30

Publication series

NameProceedings of the 2005 International Conference on Embedded Systems and Applications, ESA'05

Other

Other2005 International Conference on Embedded Systems and Applications, ESA'05
CountryUnited States
CityLas Vegas, NV
Period05/6/2705/6/30

All Science Journal Classification (ASJC) codes

  • Artificial Intelligence
  • Hardware and Architecture
  • Control and Systems Engineering

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