A hardware-efficient TSV repair scheme based on butterfly topology

Minho Cheong; Hyunyul Lim; Taehyun Kim; Sungho Kang

doi:10.1109/ISOCC47750.2019.9078496

A hardware-efficient TSV repair scheme based on butterfly topology

Minho Cheong, Hyunyul Lim, Taehyun Kim, Sungho Kang

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Three dimensional integrated circuits (3D ICs) have been proposed as a solution for the limitation of microfabrication technology. However, through-silicon via (TSV), which connects two different dies vertically, may fail, and it can decrease the yield of 3D-ICs. A novel TSV repair architecture to repair defect TSVs is proposed in this paper. By shifting the corresponding signals of the faulty TSVs vertically and diagonally to the non-faulty TSVs, the proposed method maintains repair rate of TSV to 88.6% when there are 8 faulty TSVs. The hardware area of MUXs in proposed method is 193.6 μm²while that of the previous work is 245.8 μm²and 297.9

Original language	English
Title of host publication	Proceedings - 2019 International SoC Design Conference, ISOCC 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	63-64
Number of pages	2
ISBN (Electronic)	9781728124780
DOIs	https://doi.org/10.1109/ISOCC47750.2019.9078496
Publication status	Published - 2019 Oct
Event	16th International System-on-Chip Design Conference, ISOCC 2019 - Jeju, Korea, Republic of Duration: 2019 Oct 6 → 2019 Oct 9

Publication series

Name	Proceedings - 2019 International SoC Design Conference, ISOCC 2019
Volume	2019-January

Conference

Conference	16th International System-on-Chip Design Conference, ISOCC 2019
Country/Territory	Korea, Republic of
City	Jeju
Period	19/10/6 → 19/10/9

Bibliographical note

Funding Information:
ACKNOWLEDGMENT This work was supported by the National Research Foundation of Korea(NRF) grant funded by the Korea government(MSIT) (No. 2019R1A2C3011079).

Publisher Copyright:
© 2021 IEEE.

All Science Journal Classification (ASJC) codes

Signal Processing
Electrical and Electronic Engineering
Instrumentation
Artificial Intelligence
Hardware and Architecture

Access to Document

10.1109/ISOCC47750.2019.9078496

Cite this

Cheong, M., Lim, H., Kim, T., & Kang, S. (2019). A hardware-efficient TSV repair scheme based on butterfly topology. In Proceedings - 2019 International SoC Design Conference, ISOCC 2019 (pp. 63-64). [9078496] (Proceedings - 2019 International SoC Design Conference, ISOCC 2019; Vol. 2019-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC47750.2019.9078496

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abstract = "Three dimensional integrated circuits (3D ICs) have been proposed as a solution for the limitation of microfabrication technology. However, through-silicon via (TSV), which connects two different dies vertically, may fail, and it can decrease the yield of 3D-ICs. A novel TSV repair architecture to repair defect TSVs is proposed in this paper. By shifting the corresponding signals of the faulty TSVs vertically and diagonally to the non-faulty TSVs, the proposed method maintains repair rate of TSV to 88.6% when there are 8 faulty TSVs. The hardware area of MUXs in proposed method is 193.6 μm2while that of the previous work is 245.8 μm2and 297.9",

author = "Minho Cheong and Hyunyul Lim and Taehyun Kim and Sungho Kang",

note = "Funding Information: ACKNOWLEDGMENT This work was supported by the National Research Foundation of Korea(NRF) grant funded by the Korea government(MSIT) (No. 2019R1A2C3011079). Publisher Copyright: {\textcopyright} 2021 IEEE.; 16th International System-on-Chip Design Conference, ISOCC 2019 ; Conference date: 06-10-2019 Through 09-10-2019",

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doi = "10.1109/ISOCC47750.2019.9078496",

language = "English",

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Cheong, M, Lim, H, Kim, T & Kang, S 2019, A hardware-efficient TSV repair scheme based on butterfly topology. in Proceedings - 2019 International SoC Design Conference, ISOCC 2019., 9078496, Proceedings - 2019 International SoC Design Conference, ISOCC 2019, vol. 2019-January, Institute of Electrical and Electronics Engineers Inc., pp. 63-64, 16th International System-on-Chip Design Conference, ISOCC 2019, Jeju, Korea, Republic of, 19/10/6. https://doi.org/10.1109/ISOCC47750.2019.9078496

A hardware-efficient TSV repair scheme based on butterfly topology. / Cheong, Minho; Lim, Hyunyul; Kim, Taehyun et al.

Proceedings - 2019 International SoC Design Conference, ISOCC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 63-64 9078496 (Proceedings - 2019 International SoC Design Conference, ISOCC 2019; Vol. 2019-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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A hardware-efficient TSV repair scheme based on butterfly topology

Abstract

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Bibliographical note

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