Abstract
In this paper we report a high dynamic range CMOS image sensor (CIS) with in-pixel floating-node analog memory for pixel level integration time control. Each pixel has different integration time based upon the amount of its previous frame illumination. We can implement true CDS technique to reduce reset noise without any additional hardware because we use a floating-node parasitic capacitor as an analog memory. In the fabricated test sensor, we could achieve the extended dynamic range by more than 42dB. To the best of our knowledge, this is the first report on the use of pixel-node parasitic capacitor as an analog memory for the extension of dynamic range.
| Original language | English |
|---|---|
| Title of host publication | 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers |
| Pages | 25-26 |
| Number of pages | 2 |
| Publication status | Published - 2006 Dec 1 |
| Event | 2006 Symposium on VLSI Circuits, VLSIC - Honolulu, HI, United States Duration: 2006 Jun 15 → 2006 Jun 17 |
Publication series
| Name | IEEE Symposium on VLSI Circuits, Digest of Technical Papers |
|---|
Conference
| Conference | 2006 Symposium on VLSI Circuits, VLSIC |
|---|---|
| Country | United States |
| City | Honolulu, HI |
| Period | 06/6/15 → 06/6/17 |
Fingerprint
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
Cite this
}
A high dynamic range CMOS image sensor with in-pixel floating-node analog memory for pixel level integration time control. / Han, Sang Wook; Kim, Seong Jin; Choi, Jae Hyuk; Kim, Choong Ki; Yoon, Euisik.
2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. 2006. p. 25-26 1705294 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - A high dynamic range CMOS image sensor with in-pixel floating-node analog memory for pixel level integration time control
AU - Han, Sang Wook
AU - Kim, Seong Jin
AU - Choi, Jae Hyuk
AU - Kim, Choong Ki
AU - Yoon, Euisik
PY - 2006/12/1
Y1 - 2006/12/1
N2 - In this paper we report a high dynamic range CMOS image sensor (CIS) with in-pixel floating-node analog memory for pixel level integration time control. Each pixel has different integration time based upon the amount of its previous frame illumination. We can implement true CDS technique to reduce reset noise without any additional hardware because we use a floating-node parasitic capacitor as an analog memory. In the fabricated test sensor, we could achieve the extended dynamic range by more than 42dB. To the best of our knowledge, this is the first report on the use of pixel-node parasitic capacitor as an analog memory for the extension of dynamic range.
AB - In this paper we report a high dynamic range CMOS image sensor (CIS) with in-pixel floating-node analog memory for pixel level integration time control. Each pixel has different integration time based upon the amount of its previous frame illumination. We can implement true CDS technique to reduce reset noise without any additional hardware because we use a floating-node parasitic capacitor as an analog memory. In the fabricated test sensor, we could achieve the extended dynamic range by more than 42dB. To the best of our knowledge, this is the first report on the use of pixel-node parasitic capacitor as an analog memory for the extension of dynamic range.
UR - http://www.scopus.com/inward/record.url?scp=34548850418&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=34548850418&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:34548850418
SN - 1424400066
SN - 9781424400065
T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers
SP - 25
EP - 26
BT - 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers
ER -