We present a CMOS integrated optical receiver having under-damped transimpedance amplifier (TIA) and CMOS avalanche photodetector (APD) realized in 65-nm CMOS technology. The under-damped TIA compensates the bandwidth limitation of CMOS APD and provides enhanced receiver bandwidth performance with reduced power consumption and better sensitivity compared to previously reported techniques. We successfully demonstrate 10-Gb/s 231-1 PRBS and 12.5-Gb/s 27-1 PRBS operation with the bit-error rate less than 10-12 at the incident optical power of -6 and -2 dBm, respectively. The receiver has core size of 0.24 × 0.1 mm2 and power consumption excluding output buffer of about 13.7 mW with 1.2-V supply voltage.
|Title of host publication||2015 IEEE Photonics Conference, IPC 2015|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||4|
|Publication status||Published - 2015 Nov 9|
|Event||IEEE Photonics Conference, IPC 2015 - Reston, United States|
Duration: 2015 Aug 30 → 2015 Aug 31
|Name||2015 IEEE Photonics Conference, IPC 2015|
|Other||IEEE Photonics Conference, IPC 2015|
|Period||15/8/30 → 15/8/31|
Bibliographical noteFunding Information:
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MEST) (2012RIA2AIA-OI009233).
© 2015 IEEE.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering