A high-speed CMOS integrated optical receiver with an under-damped TIA

Hyun Yong Jung, Jeong Min Lee, Woo Young Choi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

We present a CMOS integrated optical receiver having under-damped transimpedance amplifier (TIA) and CMOS avalanche photodetector (APD) realized in 65-nm CMOS technology. The under-damped TIA compensates the bandwidth limitation of CMOS APD and provides enhanced receiver bandwidth performance with reduced power consumption and better sensitivity compared to previously reported techniques. We successfully demonstrate 10-Gb/s 231-1 PRBS and 12.5-Gb/s 27-1 PRBS operation with the bit-error rate less than 10-12 at the incident optical power of -6 and -2 dBm, respectively. The receiver has core size of 0.24 × 0.1 mm2 and power consumption excluding output buffer of about 13.7 mW with 1.2-V supply voltage.

Original languageEnglish
Title of host publication2015 IEEE Photonics Conference, IPC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages347-350
Number of pages4
ISBN (Electronic)9781479974658
DOIs
Publication statusPublished - 2015 Nov 9
EventIEEE Photonics Conference, IPC 2015 - Reston, United States
Duration: 2015 Aug 302015 Aug 31

Publication series

Name2015 IEEE Photonics Conference, IPC 2015

Other

OtherIEEE Photonics Conference, IPC 2015
CountryUnited States
CityReston
Period15/8/3015/8/31

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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    Jung, H. Y., Lee, J. M., & Choi, W. Y. (2015). A high-speed CMOS integrated optical receiver with an under-damped TIA. In 2015 IEEE Photonics Conference, IPC 2015 (pp. 347-350). [7323592] (2015 IEEE Photonics Conference, IPC 2015). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IPCon.2015.7323592