A low-loss silicon-on-silicon DC-110-GHz resonance-free package

Byung Wook Min, Gabriel M. Rebeiz

Research output: Contribution to journalArticle

21 Citations (Scopus)

Abstract

This paper reports on the design and fabrication of a hermetic-compatible wafer-scale package for microwave and millimeter-wave devices. Coplanar waveguide (CPW) lines on a high-resistivity silicon wafer are covered with another silicon wafer using gold-to-gold thermo-compression bonding. Oxide is used as a dielectric inter-layer for CPW feed-throughs underneath the gold sealing ring. A 130-μm-high cavity is etched in the cap wafer to remove an impact of capping wafer on CPW lines or RF devices. The designed feed-through has an insertion loss of 0.05-0.26 dB at dc-110 GHz with a return loss of < -20 dB (per transition). The gold sealing ring is connected to the CPW ground to eliminate any parasitic resonance and leakage of the package. The whole packaged CPW line has a measured insertion loss of 0.2-0.7 dB and return loss of <-20 dB at dc-110 GHz.

Original languageEnglish
Pages (from-to)710-716
Number of pages7
JournalIEEE Transactions on Microwave Theory and Techniques
Volume54
Issue number2
DOIs
Publication statusPublished - 2006 Feb 1

Fingerprint

Coplanar waveguides
direct current
wafers
Telephone lines
waveguides
Silicon
Gold
gold
silicon
sealing
Antenna feeders
Insertion losses
Silicon wafers
insertion loss
Millimeter wave devices
Antenna grounds
rings
caps
millimeter waves
Compaction

All Science Journal Classification (ASJC) codes

  • Radiation
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Cite this

@article{8c01d0ee27ec4b0686c0c261010b63bd,
title = "A low-loss silicon-on-silicon DC-110-GHz resonance-free package",
abstract = "This paper reports on the design and fabrication of a hermetic-compatible wafer-scale package for microwave and millimeter-wave devices. Coplanar waveguide (CPW) lines on a high-resistivity silicon wafer are covered with another silicon wafer using gold-to-gold thermo-compression bonding. Oxide is used as a dielectric inter-layer for CPW feed-throughs underneath the gold sealing ring. A 130-μm-high cavity is etched in the cap wafer to remove an impact of capping wafer on CPW lines or RF devices. The designed feed-through has an insertion loss of 0.05-0.26 dB at dc-110 GHz with a return loss of < -20 dB (per transition). The gold sealing ring is connected to the CPW ground to eliminate any parasitic resonance and leakage of the package. The whole packaged CPW line has a measured insertion loss of 0.2-0.7 dB and return loss of <-20 dB at dc-110 GHz.",
author = "Min, {Byung Wook} and Rebeiz, {Gabriel M.}",
year = "2006",
month = "2",
day = "1",
doi = "10.1109/TMTT.2005.862655",
language = "English",
volume = "54",
pages = "710--716",
journal = "IEEE Transactions on Microwave Theory and Techniques",
issn = "0018-9480",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "2",

}

A low-loss silicon-on-silicon DC-110-GHz resonance-free package. / Min, Byung Wook; Rebeiz, Gabriel M.

In: IEEE Transactions on Microwave Theory and Techniques, Vol. 54, No. 2, 01.02.2006, p. 710-716.

Research output: Contribution to journalArticle

TY - JOUR

T1 - A low-loss silicon-on-silicon DC-110-GHz resonance-free package

AU - Min, Byung Wook

AU - Rebeiz, Gabriel M.

PY - 2006/2/1

Y1 - 2006/2/1

N2 - This paper reports on the design and fabrication of a hermetic-compatible wafer-scale package for microwave and millimeter-wave devices. Coplanar waveguide (CPW) lines on a high-resistivity silicon wafer are covered with another silicon wafer using gold-to-gold thermo-compression bonding. Oxide is used as a dielectric inter-layer for CPW feed-throughs underneath the gold sealing ring. A 130-μm-high cavity is etched in the cap wafer to remove an impact of capping wafer on CPW lines or RF devices. The designed feed-through has an insertion loss of 0.05-0.26 dB at dc-110 GHz with a return loss of < -20 dB (per transition). The gold sealing ring is connected to the CPW ground to eliminate any parasitic resonance and leakage of the package. The whole packaged CPW line has a measured insertion loss of 0.2-0.7 dB and return loss of <-20 dB at dc-110 GHz.

AB - This paper reports on the design and fabrication of a hermetic-compatible wafer-scale package for microwave and millimeter-wave devices. Coplanar waveguide (CPW) lines on a high-resistivity silicon wafer are covered with another silicon wafer using gold-to-gold thermo-compression bonding. Oxide is used as a dielectric inter-layer for CPW feed-throughs underneath the gold sealing ring. A 130-μm-high cavity is etched in the cap wafer to remove an impact of capping wafer on CPW lines or RF devices. The designed feed-through has an insertion loss of 0.05-0.26 dB at dc-110 GHz with a return loss of < -20 dB (per transition). The gold sealing ring is connected to the CPW ground to eliminate any parasitic resonance and leakage of the package. The whole packaged CPW line has a measured insertion loss of 0.2-0.7 dB and return loss of <-20 dB at dc-110 GHz.

UR - http://www.scopus.com/inward/record.url?scp=33144484018&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33144484018&partnerID=8YFLogxK

U2 - 10.1109/TMTT.2005.862655

DO - 10.1109/TMTT.2005.862655

M3 - Article

AN - SCOPUS:33144484018

VL - 54

SP - 710

EP - 716

JO - IEEE Transactions on Microwave Theory and Techniques

JF - IEEE Transactions on Microwave Theory and Techniques

SN - 0018-9480

IS - 2

ER -