A low-power and low-complexity baseband processor for MIMO-OFDM WLAN systems

Junha Im, Misuk Cho, Yongmin Jung, Yunho Jung, Jaeseok Kim

Research output: Contribution to journalArticle

5 Citations (Scopus)

Abstract

This paper presents an energy-efficient design and the implementation results of a high speed two transmitter-two receiver multi-input multi-output orthogonal frequency division multiplexing (MIMO-OFDM) wireless LAN baseband processor. The proposed processor includes a bit-parallel processing physical layer convergence procedure (PLCP) processor which lowers system clock frequency. A cost-efficient MIMO spatial multiplexing (SM) symbol detector is also proposed in a physical medium dependent (PMD) processor. The proposed symbol detection algorithm is based on a sorted QR decomposition (SQRD) scheme followed by a maximum-likelihood (ML) test. The proposed algorithm shows enhanced performance compared to the conventional algorithms such as SQRD and ordered successive interference cancellation (OSIC) algorithms. The proposed baseband processor supports a maximum data rate of 130 Mbps at a 40 MHz operation frequency. The power consumptions of the PLCP processor are 27 mW and 93 mW for TX and RX modes, respectively, which are reduced by 70% compared with that of a common bit-serial architecture. The complexity of the symbol detector in the PMD processor is reduced by 18% compared with that of the conventional hardware architecture.

Original languageEnglish
Pages (from-to)19-30
Number of pages12
JournalJournal of Signal Processing Systems
Volume68
Issue number1
DOIs
Publication statusPublished - 2012 Jul 1

Fingerprint

Wireless LAN
Wireless local area networks (WLAN)
Orthogonal Frequency Division multiplexing (OFDM)
Low Complexity
Orthogonal frequency division multiplexing
QR Decomposition
Output
Detector
Successive Interference Cancellation
Detectors
Decomposition
Spatial multiplexing
Hardware Architecture
Dependent
Parallel Processing
Multiplexing
MIMO systems
Energy Efficient
Local area networks
Multiple-input multiple-output (MIMO)

All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering
  • Theoretical Computer Science
  • Signal Processing
  • Information Systems
  • Modelling and Simulation
  • Hardware and Architecture

Cite this

Im, Junha ; Cho, Misuk ; Jung, Yongmin ; Jung, Yunho ; Kim, Jaeseok. / A low-power and low-complexity baseband processor for MIMO-OFDM WLAN systems. In: Journal of Signal Processing Systems. 2012 ; Vol. 68, No. 1. pp. 19-30.
@article{1e13237ce3f04f11a0728f46eb4dd46b,
title = "A low-power and low-complexity baseband processor for MIMO-OFDM WLAN systems",
abstract = "This paper presents an energy-efficient design and the implementation results of a high speed two transmitter-two receiver multi-input multi-output orthogonal frequency division multiplexing (MIMO-OFDM) wireless LAN baseband processor. The proposed processor includes a bit-parallel processing physical layer convergence procedure (PLCP) processor which lowers system clock frequency. A cost-efficient MIMO spatial multiplexing (SM) symbol detector is also proposed in a physical medium dependent (PMD) processor. The proposed symbol detection algorithm is based on a sorted QR decomposition (SQRD) scheme followed by a maximum-likelihood (ML) test. The proposed algorithm shows enhanced performance compared to the conventional algorithms such as SQRD and ordered successive interference cancellation (OSIC) algorithms. The proposed baseband processor supports a maximum data rate of 130 Mbps at a 40 MHz operation frequency. The power consumptions of the PLCP processor are 27 mW and 93 mW for TX and RX modes, respectively, which are reduced by 70{\%} compared with that of a common bit-serial architecture. The complexity of the symbol detector in the PMD processor is reduced by 18{\%} compared with that of the conventional hardware architecture.",
author = "Junha Im and Misuk Cho and Yongmin Jung and Yunho Jung and Jaeseok Kim",
year = "2012",
month = "7",
day = "1",
doi = "10.1007/s11265-010-0570-x",
language = "English",
volume = "68",
pages = "19--30",
journal = "Journal of Signal Processing Systems",
issn = "1939-8018",
publisher = "Springer New York",
number = "1",

}

A low-power and low-complexity baseband processor for MIMO-OFDM WLAN systems. / Im, Junha; Cho, Misuk; Jung, Yongmin; Jung, Yunho; Kim, Jaeseok.

In: Journal of Signal Processing Systems, Vol. 68, No. 1, 01.07.2012, p. 19-30.

Research output: Contribution to journalArticle

TY - JOUR

T1 - A low-power and low-complexity baseband processor for MIMO-OFDM WLAN systems

AU - Im, Junha

AU - Cho, Misuk

AU - Jung, Yongmin

AU - Jung, Yunho

AU - Kim, Jaeseok

PY - 2012/7/1

Y1 - 2012/7/1

N2 - This paper presents an energy-efficient design and the implementation results of a high speed two transmitter-two receiver multi-input multi-output orthogonal frequency division multiplexing (MIMO-OFDM) wireless LAN baseband processor. The proposed processor includes a bit-parallel processing physical layer convergence procedure (PLCP) processor which lowers system clock frequency. A cost-efficient MIMO spatial multiplexing (SM) symbol detector is also proposed in a physical medium dependent (PMD) processor. The proposed symbol detection algorithm is based on a sorted QR decomposition (SQRD) scheme followed by a maximum-likelihood (ML) test. The proposed algorithm shows enhanced performance compared to the conventional algorithms such as SQRD and ordered successive interference cancellation (OSIC) algorithms. The proposed baseband processor supports a maximum data rate of 130 Mbps at a 40 MHz operation frequency. The power consumptions of the PLCP processor are 27 mW and 93 mW for TX and RX modes, respectively, which are reduced by 70% compared with that of a common bit-serial architecture. The complexity of the symbol detector in the PMD processor is reduced by 18% compared with that of the conventional hardware architecture.

AB - This paper presents an energy-efficient design and the implementation results of a high speed two transmitter-two receiver multi-input multi-output orthogonal frequency division multiplexing (MIMO-OFDM) wireless LAN baseband processor. The proposed processor includes a bit-parallel processing physical layer convergence procedure (PLCP) processor which lowers system clock frequency. A cost-efficient MIMO spatial multiplexing (SM) symbol detector is also proposed in a physical medium dependent (PMD) processor. The proposed symbol detection algorithm is based on a sorted QR decomposition (SQRD) scheme followed by a maximum-likelihood (ML) test. The proposed algorithm shows enhanced performance compared to the conventional algorithms such as SQRD and ordered successive interference cancellation (OSIC) algorithms. The proposed baseband processor supports a maximum data rate of 130 Mbps at a 40 MHz operation frequency. The power consumptions of the PLCP processor are 27 mW and 93 mW for TX and RX modes, respectively, which are reduced by 70% compared with that of a common bit-serial architecture. The complexity of the symbol detector in the PMD processor is reduced by 18% compared with that of the conventional hardware architecture.

UR - http://www.scopus.com/inward/record.url?scp=84860223793&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84860223793&partnerID=8YFLogxK

U2 - 10.1007/s11265-010-0570-x

DO - 10.1007/s11265-010-0570-x

M3 - Article

AN - SCOPUS:84860223793

VL - 68

SP - 19

EP - 30

JO - Journal of Signal Processing Systems

JF - Journal of Signal Processing Systems

SN - 1939-8018

IS - 1

ER -