A low-power area-efficient 8 bit SAR ADC using dual capacitor arrays for neural microsystems

Sun Il Chang, Euisik Yoon

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

We report an area-efficient 8bit SAR ADC using dual capacitor array banks for brain signal interface microsystems. The proposed ADC consumes 680nW and the total chip area is 0.035 mm2. We reduced the area and power by a factor of eight when compared with conventional approaches. If we increase the resolution, the area and power reduction factor exponentially increases in our architecture (e.g., a factor of 16 for 10 bit resolution). The measured SNDR, SFDR, THD, and ENOB are 42.82 ± 0.47 dB, 57.90 ± 2.82dB, -53.58 ± 2.15 dB, and 6.65 ± 0.07 bits, respectively.

Original languageEnglish
Title of host publicationProceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society
Subtitle of host publicationEngineering the Future of Biomedicine, EMBC 2009
PublisherIEEE Computer Society
Pages1647-1650
Number of pages4
ISBN (Print)9781424432967
DOIs
Publication statusPublished - 2009 Jan 1
Event31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009 - Minneapolis, MN, United States
Duration: 2009 Sep 22009 Sep 6

Publication series

NameProceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009

Conference

Conference31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009
CountryUnited States
CityMinneapolis, MN
Period09/9/209/9/6

Fingerprint

Microsystems
Capacitors
Brain

All Science Journal Classification (ASJC) codes

  • Cell Biology
  • Developmental Biology
  • Biomedical Engineering
  • Medicine(all)

Cite this

Chang, S. I., & Yoon, E. (2009). A low-power area-efficient 8 bit SAR ADC using dual capacitor arrays for neural microsystems. In Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009 (pp. 1647-1650). [5333068] (Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009). IEEE Computer Society. https://doi.org/10.1109/IEMBS.2009.5333068
Chang, Sun Il ; Yoon, Euisik. / A low-power area-efficient 8 bit SAR ADC using dual capacitor arrays for neural microsystems. Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009. IEEE Computer Society, 2009. pp. 1647-1650 (Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009).
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Chang, SI & Yoon, E 2009, A low-power area-efficient 8 bit SAR ADC using dual capacitor arrays for neural microsystems. in Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009., 5333068, Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009, IEEE Computer Society, pp. 1647-1650, 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009, Minneapolis, MN, United States, 09/9/2. https://doi.org/10.1109/IEMBS.2009.5333068

A low-power area-efficient 8 bit SAR ADC using dual capacitor arrays for neural microsystems. / Chang, Sun Il; Yoon, Euisik.

Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009. IEEE Computer Society, 2009. p. 1647-1650 5333068 (Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Chang SI, Yoon E. A low-power area-efficient 8 bit SAR ADC using dual capacitor arrays for neural microsystems. In Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009. IEEE Computer Society. 2009. p. 1647-1650. 5333068. (Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society: Engineering the Future of Biomedicine, EMBC 2009). https://doi.org/10.1109/IEMBS.2009.5333068