A Low-Power Implementation Scheme of Interpolation FIR Filters Using Distributed Arithmetic

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Abstract

This paper presents a low-power implementation scheme of interpolation FIR filters using distributed arithmetic (DA). The key idea of the proposed scheme involves look-up tables generating only nonnegative values. Thus, the proposed scheme can minimize the dynamic power consumption of interpolation FIR filters using DA without additional hardware. When used for implementing a pulse shaping filter for CDMA2000 mobile stations, the proposed filter not only has almost the same hardware complexity as the conventional one; it also has approximately 43% reduced power consumption.

Original languageEnglish
Pages (from-to)2346-2350
Number of pages5
JournalIEICE Transactions on Electronics
VolumeE86-C
Issue number11
Publication statusPublished - 2003 Nov

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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