A low-voltage phase-locked-loop (PLL) circuit with a supply-noise-compensated feedforward ring voltage-controlled oscillator (FRVCO) is demonstrated. The oscillation frequency fluctuation due to supply noise is compensated by adjusting the ratio of driving strength in feedforward and direct paths in FRVCO. A prototype 400-MHz PLL circuit operating at 0.65 V is fabricated with 180-nm standard CMOS process. Measurement results show that supply-noise compensation is successfully achieved. Our PLL consumes only 242.1 μW.
|Number of pages||5|
|Journal||IEEE Transactions on Circuits and Systems II: Express Briefs|
|Publication status||Published - 2016 Jun|
Bibliographical noteFunding Information:
This work was supported by the National Research Foundation of Korea funded by the Ministry of Education, Science, and Technology of Korea under Grant 2015R1A2A2A01007772.
© 2016 IEEE.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering