A memory-efficient heterogeneous parallel pattern matching scheme in deep packet inspection

Hyunjin Kim; Hyejeong Hong; Dongmyoung Baek; Jin Ho Ahn; Sungho Kang

doi:10.1587/elex.7.377

A memory-efficient heterogeneous parallel pattern matching scheme in deep packet inspection

Hyunjin Kim, Hyejeong Hong, Dongmyoung Baek, Jin Ho Ahn, Sungho Kang

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

6 Citations (Scopus)

Abstract

This paper presents for hardware-based parallel pattern matching scheme that adopts heterogeneous bit-split string matchers for deep packet inspection (DPI) devices. Considering the pattern lengths, a set of target patterns is partitioned into two subsets for short and long patterns. By adopting the appropriate bit-split string matcher types for the two subsets, the memory requirements can be optimized for the bit-split parallel pattern matching engine. Experimental results show that the total memory requirements decrease by 39.40% and 20.52%, in comparison with the existing bit-split pattern matching approaches.

Original language	English
Pages (from-to)	377-382
Number of pages	6
Journal	ieice electronics express
Volume	7
Issue number	5
DOIs	https://doi.org/10.1587/elex.7.377
Publication status	Published - 2010 Mar 10

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering

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A memory-efficient heterogeneous parallel pattern matching scheme in deep packet inspection

Abstract

All Science Journal Classification (ASJC) codes

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