Abstract
This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore total memory requirements can be minimized.
| Original language | English |
|---|---|
| Pages (from-to) | 396-398 |
| Number of pages | 3 |
| Journal | IEICE Transactions on Communications |
| Volume | E93-B |
| Issue number | 2 |
| DOIs | |
| Publication status | Published - 2010 Jan 1 |
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All Science Journal Classification (ASJC) codes
- Software
- Computer Networks and Communications
- Electrical and Electronic Engineering
Cite this
}
A memory-efficient pattern matching with hardware-based bit-split string matchers for deep packet inspection. / Kim, Hyun Jin; Kim, Hong Sik; Lee, Jung Hee; Ahn, Jin Ho; Kang, Sungho.
In: IEICE Transactions on Communications, Vol. E93-B, No. 2, 01.01.2010, p. 396-398.Research output: Contribution to journal › Article
TY - JOUR
T1 - A memory-efficient pattern matching with hardware-based bit-split string matchers for deep packet inspection
AU - Kim, Hyun Jin
AU - Kim, Hong Sik
AU - Lee, Jung Hee
AU - Ahn, Jin Ho
AU - Kang, Sungho
PY - 2010/1/1
Y1 - 2010/1/1
N2 - This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore total memory requirements can be minimized.
AB - This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore total memory requirements can be minimized.
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UR - http://www.scopus.com/inward/citedby.url?scp=77950511054&partnerID=8YFLogxK
U2 - 10.1587/transcom.E93.B.396
DO - 10.1587/transcom.E93.B.396
M3 - Article
AN - SCOPUS:77950511054
VL - E93-B
SP - 396
EP - 398
JO - IEICE Transactions on Communications
JF - IEICE Transactions on Communications
SN - 0916-8516
IS - 2
ER -