A memory-efficient pattern matching with hardware-based bit-split string matchers for deep packet inspection

Hyun Jin Kim; Hong Sik Kim; Jung Hee Lee; Jin Ho Ahn; Sungho Kang

doi:10.1587/transcom.E93.B.396

A memory-efficient pattern matching with hardware-based bit-split string matchers for deep packet inspection

Hyun Jin Kim, Hong Sik Kim, Jung Hee Lee, Jin Ho Ahn, Sungho Kang

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore total memory requirements can be minimized.

Original language	English
Pages (from-to)	396-398
Number of pages	3
Journal	IEICE Transactions on Communications
Volume	E93-B
Issue number	2
DOIs	https://doi.org/10.1587/transcom.E93.B.396
Publication status	Published - 2010

All Science Journal Classification (ASJC) codes

Software
Computer Networks and Communications
Electrical and Electronic Engineering

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A memory-efficient pattern matching with hardware-based bit-split string matchers for deep packet inspection

Abstract

All Science Journal Classification (ASJC) codes

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