TY - JOUR
T1 - A Miniaturized Wireless Neural Implant With Body-Coupled Power Delivery and Data Transmission
AU - Lee, Changuk
AU - Kim, Byeongseol
AU - Kim, Jejung
AU - Lee, Sangwon
AU - Jeon, Taejune
AU - Choi, Woojun
AU - Yang, Sunggu
AU - Ahn, Jong Hyun
AU - Bae, Joonsung
AU - Chae, Youngcheol
N1 - Publisher Copyright:
© 1966-2012 IEEE.
PY - 2022/11/1
Y1 - 2022/11/1
N2 - This article presents a wireless neural implant with body-coupled (BC) data transmission and power delivery for freely behaving animals and incorporates a precision front end for high-quality neural recordings. The neural implant utilizes the body as a wireless transmission medium where it only needs small electrodes for data transmission and power delivery. An external device with patch electrodes can then be placed far away from the implant without the need for precise alignment. Furthermore, a four-channel continuous-time delta-sigma modulator (CT- $\Delta \Sigma \text{M}$ ) is integrated into the system for precision neural recordings. Each neural recording CT- $\Delta \Sigma \text{M}$ achieves an 82.3-dB signal-to-noise and distortion ratio (SNDR) and an 83.3-dB dynamic range (DR) while consuming only 8.6- $\mu \text{W}$ at a signal bandwidth of 10 kHz. The neural implant integrated circuit (IC) is fabricated in a 0.11- $\mu \text{m}$ CMOS with a high-density capacitor option, and the BC data receiver (RX) IC is implemented in a 0.18- $\mu \text{m}$ CMOS. The implant IC occupies a chip area of 4 $\text {mm}^{2}$ , including a 5-nF on-chip capacitor, and draws 280 $\mu \text{A}$ from a 2.3-V supply with a working data transmitter (TX) electrode. By exploiting direct-digital signaling for data transmission, the neural implant achieves a data rate of 20.48 Mb/s and a wireless power recovery of 644 $\mu \text{W}$ , resulting in an energy efficiency of 32 pJ/b. The entire neural implant system has been successfully verified by both electrical and in vivo measurements, while the wirelessly recorded electrocorticography (ECoG) signals with the prototype neural implant inside a rat demonstrate the end-to-end functionality of the proposed system.
AB - This article presents a wireless neural implant with body-coupled (BC) data transmission and power delivery for freely behaving animals and incorporates a precision front end for high-quality neural recordings. The neural implant utilizes the body as a wireless transmission medium where it only needs small electrodes for data transmission and power delivery. An external device with patch electrodes can then be placed far away from the implant without the need for precise alignment. Furthermore, a four-channel continuous-time delta-sigma modulator (CT- $\Delta \Sigma \text{M}$ ) is integrated into the system for precision neural recordings. Each neural recording CT- $\Delta \Sigma \text{M}$ achieves an 82.3-dB signal-to-noise and distortion ratio (SNDR) and an 83.3-dB dynamic range (DR) while consuming only 8.6- $\mu \text{W}$ at a signal bandwidth of 10 kHz. The neural implant integrated circuit (IC) is fabricated in a 0.11- $\mu \text{m}$ CMOS with a high-density capacitor option, and the BC data receiver (RX) IC is implemented in a 0.18- $\mu \text{m}$ CMOS. The implant IC occupies a chip area of 4 $\text {mm}^{2}$ , including a 5-nF on-chip capacitor, and draws 280 $\mu \text{A}$ from a 2.3-V supply with a working data transmitter (TX) electrode. By exploiting direct-digital signaling for data transmission, the neural implant achieves a data rate of 20.48 Mb/s and a wireless power recovery of 644 $\mu \text{W}$ , resulting in an energy efficiency of 32 pJ/b. The entire neural implant system has been successfully verified by both electrical and in vivo measurements, while the wirelessly recorded electrocorticography (ECoG) signals with the prototype neural implant inside a rat demonstrate the end-to-end functionality of the proposed system.
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U2 - 10.1109/JSSC.2022.3202795
DO - 10.1109/JSSC.2022.3202795
M3 - Article
AN - SCOPUS:85139430711
SN - 0018-9200
VL - 57
SP - 3212
EP - 3227
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 11
ER -