A multi-block interleaving structure for NAND flash memory storage

Jong Min Jeong, Seung Ho Park, Jung Wook Park, Shin-Dug Kim, Charles Weems

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

NAND flash memory is becoming more widely used in various computing systems due to improved cost effectiveness. This research is to design a cost effective solid state disk that can support high sequential-access performance, by constructing a multi-block interleaved structure. As a way of complementing the shortcomings of MLC (multi level cell) flash memory, a group of different interleaved modules is constructed to be selectively accessed depending on request sizes. MLC flash is used in this structure because of its low manufacturing cost per capacity, even though it has a slower transfer speed and lower life endurance than SLC (single level cell) flash. Our approach is to implement an optimized MLC bank interleaving structure for applications with a high potential of sequential locality. Simulation results show that the multi-interleaved structure with sequential locality can achieve around 13.6% and 6.2% improvement in terms of reading and writing performance, compared to any single interleaved conventional structure without block separation.

Original languageEnglish
Title of host publicationProceedings of the 2008 International Conference on Computer Design, CDES 2008
Pages167-173
Number of pages7
Publication statusPublished - 2008 Dec 1
Event2008 International Conference on Computer Design, CDES 2008 - Las Vegas, NV, United States
Duration: 2008 Jul 142008 Jul 17

Other

Other2008 International Conference on Computer Design, CDES 2008
CountryUnited States
CityLas Vegas, NV
Period08/7/1408/7/17

Fingerprint

Flash memory
Cost effectiveness
Costs
Durability

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Software
  • Electrical and Electronic Engineering

Cite this

Jeong, J. M., Park, S. H., Park, J. W., Kim, S-D., & Weems, C. (2008). A multi-block interleaving structure for NAND flash memory storage. In Proceedings of the 2008 International Conference on Computer Design, CDES 2008 (pp. 167-173)
Jeong, Jong Min ; Park, Seung Ho ; Park, Jung Wook ; Kim, Shin-Dug ; Weems, Charles. / A multi-block interleaving structure for NAND flash memory storage. Proceedings of the 2008 International Conference on Computer Design, CDES 2008. 2008. pp. 167-173
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Jeong, JM, Park, SH, Park, JW, Kim, S-D & Weems, C 2008, A multi-block interleaving structure for NAND flash memory storage. in Proceedings of the 2008 International Conference on Computer Design, CDES 2008. pp. 167-173, 2008 International Conference on Computer Design, CDES 2008, Las Vegas, NV, United States, 08/7/14.

A multi-block interleaving structure for NAND flash memory storage. / Jeong, Jong Min; Park, Seung Ho; Park, Jung Wook; Kim, Shin-Dug; Weems, Charles.

Proceedings of the 2008 International Conference on Computer Design, CDES 2008. 2008. p. 167-173.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Jeong JM, Park SH, Park JW, Kim S-D, Weems C. A multi-block interleaving structure for NAND flash memory storage. In Proceedings of the 2008 International Conference on Computer Design, CDES 2008. 2008. p. 167-173