Abstract
A new 3-D fuse architecture is proposed to improve the yield of 3-D memories. Because the 2-D memories are stacked to form a 3-D memory, the repair status of the prebond is kept as the good status. However, if faults occur in the postbond on the same cells which were repaired in the prebond, they must be identified and repaired because they cannot be repaired by the previous methods. There is no research on the repair the same faulty cells which occur in the prebond and postbond yet. Therefore, the new 3-D fuse architecture is proposed to repair the faulty cells which occur in the prebond and postbond. The redundancies which repair the faulty cells in the prebond are invalidated. The faulty cells are repaired by other redundancies in the postbond by the proposed 3-D fuse architecture. Thus, the proposed technique can improve the yield of 3-D memories. The experimental results show that the proposed technique can achieve higher yields of 3-D memories because only the proposed technique can repair the same faulty cells occurring in the prebond and postbond, and verify the good repair status of the 3-D memories.
| Original language | English |
|---|---|
| Article number | 7395326 |
| Pages (from-to) | 1763-1767 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
| Volume | 35 |
| Issue number | 10 |
| DOIs | |
| Publication status | Published - 2016 Oct 1 |
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All Science Journal Classification (ASJC) codes
- Software
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering
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A New 3-D Fuse Architecture to Improve Yield of 3-D Memories. / Kang, Wooheon; Lee, Changwook; Lim, Hyunyul; Kang, Sungho.
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, No. 10, 7395326, 01.10.2016, p. 1763-1767.Research output: Contribution to journal › Article
TY - JOUR
T1 - A New 3-D Fuse Architecture to Improve Yield of 3-D Memories
AU - Kang, Wooheon
AU - Lee, Changwook
AU - Lim, Hyunyul
AU - Kang, Sungho
PY - 2016/10/1
Y1 - 2016/10/1
N2 - A new 3-D fuse architecture is proposed to improve the yield of 3-D memories. Because the 2-D memories are stacked to form a 3-D memory, the repair status of the prebond is kept as the good status. However, if faults occur in the postbond on the same cells which were repaired in the prebond, they must be identified and repaired because they cannot be repaired by the previous methods. There is no research on the repair the same faulty cells which occur in the prebond and postbond yet. Therefore, the new 3-D fuse architecture is proposed to repair the faulty cells which occur in the prebond and postbond. The redundancies which repair the faulty cells in the prebond are invalidated. The faulty cells are repaired by other redundancies in the postbond by the proposed 3-D fuse architecture. Thus, the proposed technique can improve the yield of 3-D memories. The experimental results show that the proposed technique can achieve higher yields of 3-D memories because only the proposed technique can repair the same faulty cells occurring in the prebond and postbond, and verify the good repair status of the 3-D memories.
AB - A new 3-D fuse architecture is proposed to improve the yield of 3-D memories. Because the 2-D memories are stacked to form a 3-D memory, the repair status of the prebond is kept as the good status. However, if faults occur in the postbond on the same cells which were repaired in the prebond, they must be identified and repaired because they cannot be repaired by the previous methods. There is no research on the repair the same faulty cells which occur in the prebond and postbond yet. Therefore, the new 3-D fuse architecture is proposed to repair the faulty cells which occur in the prebond and postbond. The redundancies which repair the faulty cells in the prebond are invalidated. The faulty cells are repaired by other redundancies in the postbond by the proposed 3-D fuse architecture. Thus, the proposed technique can improve the yield of 3-D memories. The experimental results show that the proposed technique can achieve higher yields of 3-D memories because only the proposed technique can repair the same faulty cells occurring in the prebond and postbond, and verify the good repair status of the 3-D memories.
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UR - http://www.scopus.com/inward/citedby.url?scp=84988039698&partnerID=8YFLogxK
U2 - 10.1109/TCAD.2016.2523444
DO - 10.1109/TCAD.2016.2523444
M3 - Article
VL - 35
SP - 1763
EP - 1767
JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SN - 0278-0070
IS - 10
M1 - 7395326
ER -