A new low power test pattern generator using a transition monitoring window based on BIST architecture

Youbean Kim, Myung Hoon Yang, Yong Lee, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Citations (Scopus)

Abstract

This paper presents a new low power BIST TPG scheme. It uses a transition monitoring window (TMW) that is comprised of a transition monitoring window block and a MUX. When random test patterns are generated by an LFSR, transitions of those patterns satisfy pseudo-random Gaussian distribution. The proposed technique represses transitions of patterns using the k-value which is a standard that is obtained from the distribution of TMW to observe over transitive patterns causing high power dissipation in a scan chain. Experimental results show that the proposed BIST TPG schemes can reduce scan transition by about 60% without performance loss in ISCAS'89 benchmark circuits that have large number scan inputs.

Original languageEnglish
Title of host publicationProceedings - 14th Asian Test Symposium, ATS 2005
Pages230-235
Number of pages6
Volume2005
DOIs
Publication statusPublished - 2005 Dec 1
Event14th Asian Test Symposium, ATS 2005 - Calcutta, India
Duration: 2005 Dec 182005 Dec 21

Other

Other14th Asian Test Symposium, ATS 2005
CountryIndia
CityCalcutta
Period05/12/1805/12/21

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Kim, Y., Yang, M. H., Lee, Y., & Kang, S. (2005). A new low power test pattern generator using a transition monitoring window based on BIST architecture. In Proceedings - 14th Asian Test Symposium, ATS 2005 (Vol. 2005, pp. 230-235). [1575434] https://doi.org/10.1109/ATS.2005.12