Abstract
Complex interconnects in highly integrated system chips are implemented with the bus structures. From a testing point of view, bus-structured systems require more complicated consideration than simple wiring networks since a bus line receives data from many drivers. Therefore, some faults are detected all the time and others are detected only at a particular time. We propose a new interconnect test algorithm for bus structures. The MD+ algorithm supports maximal diagnosis for the bus-structured system and its test period is shorter than the previous algorithms. Moreover, the MD+ algorithm is easy to apply since it is based on a complete diagnosis algorithm for wiring networks. The effectiveness of the MD+ algorithm is confirmed by comparing the test length with previous bus-based interconnect test algorithms.
Original language | English |
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Pages (from-to) | 349-357 |
Number of pages | 9 |
Journal | IEEE International Test Conference (TC) |
Publication status | Published - 2003 |
Event | Proceedings International Test Conference 2003 - Charlotte, NC, United States Duration: 2003 Sept 30 → 2003 Oct 2 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
- Applied Mathematics