A new multi-site test for system-on-chip using multi-site star test architecture

Engineering

• Design 100%
• Architecture 80%
• System-on-Chip 60%
• Test Time 40%
• Cost Reduction 40%
• Experimental Result 20%
• Input Data 20%
• Limited Number 20%
• Contact Problem 20%
• Test Data 20%
• Site Test 20%
• Output Pin 20%
• Yields 20%
• Losses 20%
• Measurer 20%
• Testing 20%
• Input Pin 20%

Computer Science

• Design 100%
• System-on-Chip 60%
• Channels 40%
• Experimental Result 20%
• Complex System 20%
• System on a Chip 20%
• Access Mechanism 20%
• Testing 20%
• Standards 20%