A new network synchronizer using phase adjustment and feedforward filtering based on low-cost crystal oscillators

Chang Kyung Seong, Seung Woo Lee, Woo Young Choi

Research output: Contribution to journalArticle

4 Citations (Scopus)

Abstract

A new network synchronizer using a two-way message exchange is proposed and implemented in a field-programmable gate array (FPGA). This synchronizer aligns its clock signal and time of day to that of the master node. For high-precision frequency control, a new phase adjustment method is employed, which efficiently provides high-frequency resolution and deterministic frequency control gain. In addition, a feedforward filter is used to reduce dithering of the time offset due to quantization errors in time-stamping. Even with a low-cost crystal oscillator, successful synchronization with root-mean-square (RMS) jitters of 0.1856 unit interval is achieved.

Original languageEnglish
Article number5345780
Pages (from-to)1764-1774
Number of pages11
JournalIEEE Transactions on Instrumentation and Measurement
Volume59
Issue number7
DOIs
Publication statusPublished - 2010 Jul 1

Fingerprint

synchronizers
crystal oscillators
Crystal oscillators
Stamping
Gain control
Jitter
Field programmable gate arrays (FPGA)
frequency control
Clocks
Synchronization
adjusting
Costs
stamping
field-programmable gate arrays
messages
clocks
synchronism
intervals
filters
vibration

All Science Journal Classification (ASJC) codes

  • Instrumentation
  • Electrical and Electronic Engineering

Cite this

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A new network synchronizer using phase adjustment and feedforward filtering based on low-cost crystal oscillators. / Seong, Chang Kyung; Lee, Seung Woo; Choi, Woo Young.

In: IEEE Transactions on Instrumentation and Measurement, Vol. 59, No. 7, 5345780, 01.07.2010, p. 1764-1774.

Research output: Contribution to journalArticle

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