A new static test of a DAC with a built-in structure

Incheol Kim, Jaewon Jang, Hyeonuk Son, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A new BIST (Built-In Self-Test) scheme to test static parameters of a DAC (Digital-to-Analog Converter) is proposed in this paper. The proposed BIST employs a ramp generator and two voltage references to calculate static parameters of a DAC such as offset, gain, INL (Integral Non-Linearity) and DNL(Differential Non-Linearity). The optimization of calculating static parameters and the element sharing can reduce the BIST circuitry. The simulation results which validate our method are able to detect the linearity errors with the simple hardware architecture.

Original languageEnglish
Title of host publication54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
DOIs
Publication statusPublished - 2011 Oct 13
Event54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011 - Seoul, Korea, Republic of
Duration: 2011 Aug 72011 Aug 10

Other

Other54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
CountryKorea, Republic of
CitySeoul
Period11/8/711/8/10

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Kim, I., Jang, J., Son, H., & Kang, S. (2011). A new static test of a DAC with a built-in structure. In 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011 [6026361] https://doi.org/10.1109/MWSCAS.2011.6026361