Abstract
Built-in redundancy analysis (BIRA) is widely used to enhance the yield of embedded memories. In this letter, a new BIRA method for both high repair efficiency and small hardware overhead is presented. The proposed method performs redundancy analysis operations using the spare mapping registers with a covered fault list. Experimental results demonstrate the superiority of the proposed method compared to previous works.
| Original language | English |
|---|---|
| Pages (from-to) | 339-341 |
| Number of pages | 3 |
| Journal | ETRI Journal |
| Volume | 31 |
| Issue number | 3 |
| DOIs | |
| Publication status | Published - 2009 Jun |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Computer Science(all)
- Electrical and Electronic Engineering
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Cite this
Yang, M. H., Cho, H., Jeong, W., & Kang, S. (2009). A novel BIRA method with high repair efficiency and small hardware overhead. ETRI Journal, 31(3), 339-341. https://doi.org/10.4218/etrij.09.0209.0024