A Novel Both-Sided Bitline Driving Technique for Low Latency in High Capacity NAND Flash

Jun Ho An, Hyun Kook Park, Tae Woo Oh, Seong Ook Jung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

High capacity design in NAND Flash has become one of the important issues due to increasing demand for memory capacity expansion. As the number of blocks in NAND Flash increases for high capacity, the driving time of bitline (BL) increases with a large RC, which should be resolved for high capacity NAND Flash. This paper proposes a both-sided BL driving scheme (BSBLDS) for high capacity NAND Flash to achieve a fast driving operation by using an area-optimal NMOS at the far side of the BL. In the conventional one-sided BL driving scheme, the BL driving takes a long time because the current of the BL far node is significantly smaller than that of the BL near node. In the proposed BSBLDS, the both-sided BL overdriving and discharging modes are respectively implemented for fast precharge and discharge operations. The proposed BSBLDS achieves 180% faster precharge speed and 190% faster discharge speed than the conventional driving scheme.

Original languageEnglish
Title of host publicationITC-CSCC 2020 - 35th International Technical Conference on Circuits/Systems, Computers and Communications
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages384-388
Number of pages5
ISBN (Electronic)9784885523281
Publication statusPublished - 2020 Jul
Event35th International Technical Conference on Circuits/Systems, Computers and Communications, ITC-CSCC 2020 - Nagoya, Japan
Duration: 2020 Jul 32020 Jul 6

Publication series

NameITC-CSCC 2020 - 35th International Technical Conference on Circuits/Systems, Computers and Communications

Conference

Conference35th International Technical Conference on Circuits/Systems, Computers and Communications, ITC-CSCC 2020
CountryJapan
CityNagoya
Period20/7/320/7/6

Bibliographical note

Publisher Copyright:
© 2020 IEICE.

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Hardware and Architecture
  • Information Systems and Management
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'A Novel Both-Sided Bitline Driving Technique for Low Latency in High Capacity NAND Flash'. Together they form a unique fingerprint.

Cite this