A Novel Heat-Aware Write Method with Optimized Heater Material and Structure in sub-20 nm PRAM for Low Energy Operation

Hyun Kook Park, Tae Woo Oh, Seong Ook Jung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

For application of PRAM to IoT devices, it is necessary to reduce write energy consumption of PRAM. In a sub-20nm PRAM technology, the optimization of heater material and structure was performed with the Sentaurus TCAD simulator, which notices that the TiN is more preferred than the Poly Si or W and the wall structure has better write energy efficiency than the confined structure. In addition, a novel heat-aware write method (HAW) is proposed, which controls the write current and voltage considering with the heat generated by the heater. With the HSPICE simulation using 0.25- μ m industry-compatible model, PRAM cell achieves the write energy improvement by 22%, 19%, and 36% in the case of the wall structure with TiN, the proposed HAW, and both, respectively.

Original languageEnglish
Title of host publication2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages273-276
Number of pages4
ISBN (Electronic)9781538695623
DOIs
Publication statusPublished - 2019 Jan 17
Event25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 - Bordeaux, France
Duration: 2018 Dec 92018 Dec 12

Publication series

Name2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018

Conference

Conference25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
CountryFrance
CityBordeaux
Period18/12/918/12/12

Fingerprint

heaters
heat
energy consumption
Polysilicon
simulators
Energy efficiency
energy
Energy utilization
Simulators
industries
optimization
Electric potential
electric potential
cells
Hot Temperature
Industry
simulation

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Instrumentation

Cite this

Park, H. K., Oh, T. W., & Jung, S. O. (2019). A Novel Heat-Aware Write Method with Optimized Heater Material and Structure in sub-20 nm PRAM for Low Energy Operation. In 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 (pp. 273-276). [8617915] (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICECS.2018.8617915
Park, Hyun Kook ; Oh, Tae Woo ; Jung, Seong Ook. / A Novel Heat-Aware Write Method with Optimized Heater Material and Structure in sub-20 nm PRAM for Low Energy Operation. 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 273-276 (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018).
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title = "A Novel Heat-Aware Write Method with Optimized Heater Material and Structure in sub-20 nm PRAM for Low Energy Operation",
abstract = "For application of PRAM to IoT devices, it is necessary to reduce write energy consumption of PRAM. In a sub-20nm PRAM technology, the optimization of heater material and structure was performed with the Sentaurus TCAD simulator, which notices that the TiN is more preferred than the Poly Si or W and the wall structure has better write energy efficiency than the confined structure. In addition, a novel heat-aware write method (HAW) is proposed, which controls the write current and voltage considering with the heat generated by the heater. With the HSPICE simulation using 0.25- μ m industry-compatible model, PRAM cell achieves the write energy improvement by 22{\%}, 19{\%}, and 36{\%} in the case of the wall structure with TiN, the proposed HAW, and both, respectively.",
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Park, HK, Oh, TW & Jung, SO 2019, A Novel Heat-Aware Write Method with Optimized Heater Material and Structure in sub-20 nm PRAM for Low Energy Operation. in 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018., 8617915, 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018, Institute of Electrical and Electronics Engineers Inc., pp. 273-276, 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018, Bordeaux, France, 18/12/9. https://doi.org/10.1109/ICECS.2018.8617915

A Novel Heat-Aware Write Method with Optimized Heater Material and Structure in sub-20 nm PRAM for Low Energy Operation. / Park, Hyun Kook; Oh, Tae Woo; Jung, Seong Ook.

2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. Institute of Electrical and Electronics Engineers Inc., 2019. p. 273-276 8617915 (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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AB - For application of PRAM to IoT devices, it is necessary to reduce write energy consumption of PRAM. In a sub-20nm PRAM technology, the optimization of heater material and structure was performed with the Sentaurus TCAD simulator, which notices that the TiN is more preferred than the Poly Si or W and the wall structure has better write energy efficiency than the confined structure. In addition, a novel heat-aware write method (HAW) is proposed, which controls the write current and voltage considering with the heat generated by the heater. With the HSPICE simulation using 0.25- μ m industry-compatible model, PRAM cell achieves the write energy improvement by 22%, 19%, and 36% in the case of the wall structure with TiN, the proposed HAW, and both, respectively.

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Park HK, Oh TW, Jung SO. A Novel Heat-Aware Write Method with Optimized Heater Material and Structure in sub-20 nm PRAM for Low Energy Operation. In 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. Institute of Electrical and Electronics Engineers Inc. 2019. p. 273-276. 8617915. (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018). https://doi.org/10.1109/ICECS.2018.8617915