Cross-point-array nonvolatile ternary content-addressable memory (CPA nvTCAM) has recently emerged as an alternative to static random-access-memory-type TCAM, based on increased demands for high-capacity and low-power attributes. The CPA structure has various structural weaknesses such as the searchline (SL) combining with the dischargeline and the minimum line pitch of the matchline (ML). This study analyzes these weaknesses in detail for the first time and resolves the issues caused by these weaknesses using the proposed novel ML shield scheduling method with a matching probability-based flexible searching time technique (MLSS + MPFST). The proposed MLSS + MPFST resolves various issues and achieves greater than sixfold smaller cell size (8F2) than the non-CPA nvTCAM with the smallest cell size. To verify the proposed schemes, the Monte Carlo HSPICE simulations were performed using a 22-nm industry-compatible bulk FinFET model parameter in 20-nm resistive memory technology at a circuit level, and the gem5 simulations were performed at a system level. The simulation results indicated that the CPA nvTCAM with the proposed MLSS + MPFST achieved a comparable search operation time of 1 ns and a slight power consumption overhead of 10% but an acceptable system performance overhead of less than 0.6% by resolving the various issues, compared with the non-CPA nvTCAM having the best performance.
|Number of pages||8|
|Journal||IEEE Transactions on Very Large Scale Integration (VLSI) Systems|
|Publication status||Published - 2020 Dec|
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering