A processor architecture with effective memory system for sort-last parallel rendering

Woo Chan Park, Duk Ki Yoon, Kil Whan Lee, Il San Kim, Kyung Su Kim, Won Jong Lee, Tack Don Han, Sung Bong Yang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, a consistency-free memory architecture for sort-last parallel rendering processors with a single frame buffer is proposed to resolve the consistency problem which may occur when more than one rasterizer try to access the data at the same address. Also, the proposed architecture reduces the latency due to pixel cache misses because the rasterizer does not wait until cache miss handling Is completed when the pixel cache miss occurs. For these goals, a consistency-free pixel cache architecture and three effective memory systems with consistency-test units are presented. The experimental results show that the proposed architecture can achieve almost linear speedup up to four rasterizers with a single frame buffer.

Original languageEnglish
Title of host publicationArchitecture of Computing Systems - ARCS 2006 - 19th International Conference, Proceedings
Pages160-175
Number of pages16
Publication statusPublished - 2006 Jul 10
Event19th International Conference on Architecture of Computing Systems, ARCS 2006 - Frankfurt, Main, Germany
Duration: 2006 Mar 132006 Mar 16

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume3894 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other19th International Conference on Architecture of Computing Systems, ARCS 2006
CountryGermany
CityFrankfurt, Main
Period06/3/1306/3/16

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All Science Journal Classification (ASJC) codes

  • Theoretical Computer Science
  • Computer Science(all)

Cite this

Park, W. C., Yoon, D. K., Lee, K. W., Kim, I. S., Kim, K. S., Lee, W. J., Han, T. D., & Yang, S. B. (2006). A processor architecture with effective memory system for sort-last parallel rendering. In Architecture of Computing Systems - ARCS 2006 - 19th International Conference, Proceedings (pp. 160-175). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 3894 LNCS).